Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors
In this paper, a compact and complementary logic implementation is proposed for antiferromagnet field-effect transistor (AFMFET) devices. The implementation enables a complete set of Boolean operations based on complementary logic as well as majority-gate logic. The impacts of several key device-lev...
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Format: | Article |
Language: | English |
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IEEE
2018-01-01
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Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
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Online Access: | https://ieeexplore.ieee.org/document/8515251/ |
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author | Chenyun Pan Azad Naeemi |
author_facet | Chenyun Pan Azad Naeemi |
author_sort | Chenyun Pan |
collection | DOAJ |
description | In this paper, a compact and complementary logic implementation is proposed for antiferromagnet field-effect transistor (AFMFET) devices. The implementation enables a complete set of Boolean operations based on complementary logic as well as majority-gate logic. The impacts of several key device-level design parameters are investigated, such as the channel resistance and critical switching voltage, and their optimal values that minimize the overall energy-delay product (EDP) of a 32-bit arithmetic logic unit are quantified. In addition, it is shown that one can potentially take advantage of the large domain size of some AFM materials such as chromium and build a compact majority-gate-based logic. The potential performance benefits of the majority-gate-based logic are also quantified. Compared to the conventional CMOS logic circuit, the one with AFMFET devices using majority gates can potentially achieve 10× improvement in terms of the EDP. |
first_indexed | 2024-12-19T13:47:19Z |
format | Article |
id | doaj.art-495ff55181b242ac8b9a5b4ffb5eb4ec |
institution | Directory Open Access Journal |
issn | 2329-9231 |
language | English |
last_indexed | 2024-12-19T13:47:19Z |
publishDate | 2018-01-01 |
publisher | IEEE |
record_format | Article |
series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
spelling | doaj.art-495ff55181b242ac8b9a5b4ffb5eb4ec2022-12-21T20:18:50ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312018-01-0142697510.1109/JXCDC.2018.28786358515251Complementary Logic Implementation for Antiferromagnet Field-Effect TransistorsChenyun Pan0https://orcid.org/0000-0001-9161-1728Azad Naeemi1Department of Electrical Engineering and Computer Science, The University of Kansas, Lawrence, KS, USASchool of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USAIn this paper, a compact and complementary logic implementation is proposed for antiferromagnet field-effect transistor (AFMFET) devices. The implementation enables a complete set of Boolean operations based on complementary logic as well as majority-gate logic. The impacts of several key device-level design parameters are investigated, such as the channel resistance and critical switching voltage, and their optimal values that minimize the overall energy-delay product (EDP) of a 32-bit arithmetic logic unit are quantified. In addition, it is shown that one can potentially take advantage of the large domain size of some AFM materials such as chromium and build a compact majority-gate-based logic. The potential performance benefits of the majority-gate-based logic are also quantified. Compared to the conventional CMOS logic circuit, the one with AFMFET devices using majority gates can potentially achieve 10× improvement in terms of the EDP.https://ieeexplore.ieee.org/document/8515251/Antiferromagnet field-effect transistor (AFMFET)complementary logicmajority-gate logicperformance analysis |
spellingShingle | Chenyun Pan Azad Naeemi Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Antiferromagnet field-effect transistor (AFMFET) complementary logic majority-gate logic performance analysis |
title | Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors |
title_full | Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors |
title_fullStr | Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors |
title_full_unstemmed | Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors |
title_short | Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors |
title_sort | complementary logic implementation for antiferromagnet field effect transistors |
topic | Antiferromagnet field-effect transistor (AFMFET) complementary logic majority-gate logic performance analysis |
url | https://ieeexplore.ieee.org/document/8515251/ |
work_keys_str_mv | AT chenyunpan complementarylogicimplementationforantiferromagnetfieldeffecttransistors AT azadnaeemi complementarylogicimplementationforantiferromagnetfieldeffecttransistors |