PLC implementation in the form of a System-on-a-Chip
The aim of the paper is to present the implementation of a PLC designed in the form of a System-on-a-Chip. The presented PLC is compatible with the IEC61131‒3 standard. More precisely, the Instruction List language is the native language of the designed CPU, so there is no need for multiple language...
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| Format: | Article |
| Language: | English |
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Polish Academy of Sciences
2020-12-01
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| Series: | Bulletin of the Polish Academy of Sciences: Technical Sciences |
| Subjects: | |
| Online Access: | https://journals.pan.pl/Content/118364/PDF/03_D1263-1273_01695_Bpast.No.68-6_29.12.20_OK.pdf |
| _version_ | 1798040862108680192 |
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| author | P. Mazur R. Czerwinski M. Chmiel |
| author_facet | P. Mazur R. Czerwinski M. Chmiel |
| author_sort | P. Mazur |
| collection | DOAJ |
| description | The aim of the paper is to present the implementation of a PLC designed in the form of a System-on-a-Chip. The presented PLC is compatible with the IEC61131‒3 standard. More precisely, the Instruction List language is the native language of the designed CPU, so there is no need for multiple language transformations. In the proposed solution each instruction of the CPU program written in Instruction List is directly translated to machine code. The designed CPU is capable of performing logic operations up to 32-bit Boolean data types. However, the developed CPU is very flexible due to its architecture: data memory can be addressed as bit/byte/word/dword. Moreover, diverse blocks such as timers, counters, and hardware acceleration blocks, can be connected to the CPU by means of an APB AMBA bus. The designed PLC has been implemented in an FPGA device and can be used in cyber-physical systems and Industry 4.0. |
| first_indexed | 2024-04-11T22:13:31Z |
| format | Article |
| id | doaj.art-4a1d317e8e674b4eb98ddcd7afabbe3b |
| institution | Directory Open Access Journal |
| issn | 2300-1917 |
| language | English |
| last_indexed | 2024-04-11T22:13:31Z |
| publishDate | 2020-12-01 |
| publisher | Polish Academy of Sciences |
| record_format | Article |
| series | Bulletin of the Polish Academy of Sciences: Technical Sciences |
| spelling | doaj.art-4a1d317e8e674b4eb98ddcd7afabbe3b2022-12-22T04:00:30ZengPolish Academy of SciencesBulletin of the Polish Academy of Sciences: Technical Sciences2300-19172020-12-0168No. 612631273https://doi.org/10.24425/bpasts.2020.135386PLC implementation in the form of a System-on-a-ChipP. MazurR. CzerwinskiM. ChmielThe aim of the paper is to present the implementation of a PLC designed in the form of a System-on-a-Chip. The presented PLC is compatible with the IEC61131‒3 standard. More precisely, the Instruction List language is the native language of the designed CPU, so there is no need for multiple language transformations. In the proposed solution each instruction of the CPU program written in Instruction List is directly translated to machine code. The designed CPU is capable of performing logic operations up to 32-bit Boolean data types. However, the developed CPU is very flexible due to its architecture: data memory can be addressed as bit/byte/word/dword. Moreover, diverse blocks such as timers, counters, and hardware acceleration blocks, can be connected to the CPU by means of an APB AMBA bus. The designed PLC has been implemented in an FPGA device and can be used in cyber-physical systems and Industry 4.0.https://journals.pan.pl/Content/118364/PDF/03_D1263-1273_01695_Bpast.No.68-6_29.12.20_OK.pdfplcfpgaambaapbiec 61131-3 |
| spellingShingle | P. Mazur R. Czerwinski M. Chmiel PLC implementation in the form of a System-on-a-Chip Bulletin of the Polish Academy of Sciences: Technical Sciences plc fpga amba apb iec 61131-3 |
| title | PLC implementation in the form of a System-on-a-Chip |
| title_full | PLC implementation in the form of a System-on-a-Chip |
| title_fullStr | PLC implementation in the form of a System-on-a-Chip |
| title_full_unstemmed | PLC implementation in the form of a System-on-a-Chip |
| title_short | PLC implementation in the form of a System-on-a-Chip |
| title_sort | plc implementation in the form of a system on a chip |
| topic | plc fpga amba apb iec 61131-3 |
| url | https://journals.pan.pl/Content/118364/PDF/03_D1263-1273_01695_Bpast.No.68-6_29.12.20_OK.pdf |
| work_keys_str_mv | AT pmazur plcimplementationintheformofasystemonachip AT rczerwinski plcimplementationintheformofasystemonachip AT mchmiel plcimplementationintheformofasystemonachip |