A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications
This paper presents a fully MOSFET DC voltage limiter with low current consumption. In the proposed voltage reference structure to reduce power consumption, transistors are biased in the sub-threshold region. To generate complementary to absolute temperature (CTAT) voltage in the voltage reference...
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| Format: | Article |
| Language: | English |
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Spolecnost pro radioelektronicke inzenyrstvi
2022-09-01
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| Series: | Radioengineering |
| Subjects: | |
| Online Access: | https://www.radioeng.cz/fulltexts/2022/22_03_0323_0330.pdf |
| _version_ | 1798033358204174336 |
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| author | H. Rayat R. Dastanian |
| author_facet | H. Rayat R. Dastanian |
| author_sort | H. Rayat |
| collection | DOAJ |
| description | This paper presents a fully MOSFET DC voltage limiter with low current consumption. In the proposed voltage reference structure to reduce power consumption, transistors are biased in the sub-threshold region. To generate complementary to absolute temperature (CTAT) voltage in the voltage reference circuit, only a PMOS transistor is used, in which its drain, gate, and source terminals are connected together and acts as a diode that reduces the layout area occupation. To further reduce power consumption, a part of the rectifier output voltage is compared with the reference voltage by the sampling circuit. Also, four stage inverters are used as buffers to provide the I-V limiting characteristic closer to the ideal situation. The use of series pass-gate transistors in the first inverter also reduces power consumption as much as possible. The results of post-layout simulation based on 0.18μm CMOS technology depict that the suggested voltage reference circuit has a reference voltage equivalent to 0.579V with a TC of 37.2ppm/℃ in the temperature range of -50°C to 50°C. LR and PSRR attained 0.008%/V and 45dB, respectively. The output voltage and current consumption of the limiter circuit are 2V and 32.13nA, respectively. The total layout area of the proposed limiter is 3249µm2. |
| first_indexed | 2024-04-11T20:29:06Z |
| format | Article |
| id | doaj.art-4a396a7ca97f47a7b4cfb3ea0777d4bc |
| institution | Directory Open Access Journal |
| issn | 1210-2512 |
| language | English |
| last_indexed | 2024-04-11T20:29:06Z |
| publishDate | 2022-09-01 |
| publisher | Spolecnost pro radioelektronicke inzenyrstvi |
| record_format | Article |
| series | Radioengineering |
| spelling | doaj.art-4a396a7ca97f47a7b4cfb3ea0777d4bc2022-12-22T04:04:33ZengSpolecnost pro radioelektronicke inzenyrstviRadioengineering1210-25122022-09-01313323330A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power ApplicationsH. RayatR. DastanianThis paper presents a fully MOSFET DC voltage limiter with low current consumption. In the proposed voltage reference structure to reduce power consumption, transistors are biased in the sub-threshold region. To generate complementary to absolute temperature (CTAT) voltage in the voltage reference circuit, only a PMOS transistor is used, in which its drain, gate, and source terminals are connected together and acts as a diode that reduces the layout area occupation. To further reduce power consumption, a part of the rectifier output voltage is compared with the reference voltage by the sampling circuit. Also, four stage inverters are used as buffers to provide the I-V limiting characteristic closer to the ideal situation. The use of series pass-gate transistors in the first inverter also reduces power consumption as much as possible. The results of post-layout simulation based on 0.18μm CMOS technology depict that the suggested voltage reference circuit has a reference voltage equivalent to 0.579V with a TC of 37.2ppm/℃ in the temperature range of -50°C to 50°C. LR and PSRR attained 0.008%/V and 45dB, respectively. The output voltage and current consumption of the limiter circuit are 2V and 32.13nA, respectively. The total layout area of the proposed limiter is 3249µm2.https://www.radioeng.cz/fulltexts/2022/22_03_0323_0330.pdflimitervoltage referencetemperature coefficientlow powervoltage sampleropabuffer |
| spellingShingle | H. Rayat R. Dastanian A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications Radioengineering limiter voltage reference temperature coefficient low power voltage sampler opa buffer |
| title | A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications |
| title_full | A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications |
| title_fullStr | A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications |
| title_full_unstemmed | A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications |
| title_short | A 2V, 32.13nA, fully MOSFET Voltage Limiter for Low Power Applications |
| title_sort | 2v 32 13na fully mosfet voltage limiter for low power applications |
| topic | limiter voltage reference temperature coefficient low power voltage sampler opa buffer |
| url | https://www.radioeng.cz/fulltexts/2022/22_03_0323_0330.pdf |
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