An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs
This paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the be...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2020-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9217430/ |
| _version_ | 1819132695566876672 |
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| author | Matej Bartik Tomas Benes Pavel Kubalik |
| author_facet | Matej Bartik Tomas Benes Pavel Kubalik |
| author_sort | Matej Bartik |
| collection | DOAJ |
| description | This paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the benefits of our approach from the perspective of logic resources, frequency, and latency. We compared two generally used methods with our optimized method, which was found to be more suitable for maintaining the memory content via (in)valid bits in any mid-density memory structures, which are implemented in programmable hardware such as FPGAs (Field Programmable Gate Array). The benefits of our new method based on a “Distributed Memory” technique are shown on a particular example of compression dictionary but the method is also suitable for another use cases requiring a fast (re-)initialization of the used memory structures before each run of an algorithm with minimum time and logic resources consumption. The performance evaluation of the respective approaches has been made in Xilinx ISE and Xilinx Vivado toolkits for the Virtex-7 FPGA family. However the proposed approach is compatible with 99% of modern FPGAs. |
| first_indexed | 2024-12-22T09:35:29Z |
| format | Article |
| id | doaj.art-4a95617bd3774cc2ae10edff38f5f5b2 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-12-22T09:35:29Z |
| publishDate | 2020-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-4a95617bd3774cc2ae10edff38f5f5b22022-12-21T18:30:51ZengIEEEIEEE Access2169-35362020-01-01818310118311610.1109/ACCESS.2020.30296919217430An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAsMatej Bartik0https://orcid.org/0000-0002-6035-1019Tomas Benes1Pavel Kubalik2Department of Digital Design, Faculty of Information Technology, Czech Technical University in Prague, Prague, Czech RepublicDepartment of Digital Design, Faculty of Information Technology, Czech Technical University in Prague, Prague, Czech RepublicDepartment of Digital Design, Faculty of Information Technology, Czech Technical University in Prague, Prague, Czech RepublicThis paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the benefits of our approach from the perspective of logic resources, frequency, and latency. We compared two generally used methods with our optimized method, which was found to be more suitable for maintaining the memory content via (in)valid bits in any mid-density memory structures, which are implemented in programmable hardware such as FPGAs (Field Programmable Gate Array). The benefits of our new method based on a “Distributed Memory” technique are shown on a particular example of compression dictionary but the method is also suitable for another use cases requiring a fast (re-)initialization of the used memory structures before each run of an algorithm with minimum time and logic resources consumption. The performance evaluation of the respective approaches has been made in Xilinx ISE and Xilinx Vivado toolkits for the Virtex-7 FPGA family. However the proposed approach is compatible with 99% of modern FPGAs.https://ieeexplore.ieee.org/document/9217430/Compression algorithmcompression dictionaryFPGAhash tableLZ4LZ77 |
| spellingShingle | Matej Bartik Tomas Benes Pavel Kubalik An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs IEEE Access Compression algorithm compression dictionary FPGA hash table LZ4 LZ77 |
| title | An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs |
| title_full | An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs |
| title_fullStr | An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs |
| title_full_unstemmed | An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs |
| title_short | An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs |
| title_sort | in sight into how compression dictionary architecture can affect the overall performance in fpgas |
| topic | Compression algorithm compression dictionary FPGA hash table LZ4 LZ77 |
| url | https://ieeexplore.ieee.org/document/9217430/ |
| work_keys_str_mv | AT matejbartik aninsightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas AT tomasbenes aninsightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas AT pavelkubalik aninsightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas AT matejbartik insightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas AT tomasbenes insightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas AT pavelkubalik insightintohowcompressiondictionaryarchitecturecanaffecttheoverallperformanceinfpgas |