Special Topic on Spintronic Devices for Energy-Efficient Computing - Jian-Ping Wang (IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2022)
The traditional scaling trend of semiconductor devices is approaching its limit with the node size in manufacturing already down to 2 nm, with a great guidance from Moore’s law. Heterogenous integration has recently been one of the major driving forces to push the semiconductor technologies further, with a great engineering effort to sum up the power of known and established technologies.