FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC

The high luminosity upgrade of the LHC is expected to deliver luminosities of 7.5 × 1034 cm−2s−1, with an average of 140–200 overlapping proton-proton collisions in each bunch crossing at a frequency of 40 MHz. To maintain manageable trigger rates under these conditions track reconstruction will be...

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Main Author: Skinnari Louise
Format: Article
Language:English
Published: EDP Sciences 2016-01-01
Series:EPJ Web of Conferences
Online Access:http://dx.doi.org/10.1051/epjconf/201612700017
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author Skinnari Louise
author_facet Skinnari Louise
author_sort Skinnari Louise
collection DOAJ
description The high luminosity upgrade of the LHC is expected to deliver luminosities of 7.5 × 1034 cm−2s−1, with an average of 140–200 overlapping proton-proton collisions in each bunch crossing at a frequency of 40 MHz. To maintain manageable trigger rates under these conditions track reconstruction will be incorporated in the all-hardware first level of the CMS trigger. A track-finding algorithm based on seed tracklets has been developed and implemented on commercially available FPGAs for this purpose. An overview of the algorithm is presented, results are shown of its expected performance from simulations, and an implementation of the algorithm in a Xilinx Virtex-7 FPGA for a hardware demonstrator system is discussed.
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spelling doaj.art-4d06c9cd67d442e09954d2e4366a9c302022-12-21T22:07:54ZengEDP SciencesEPJ Web of Conferences2100-014X2016-01-011270001710.1051/epjconf/201612700017epjconf_dots2016_00017FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHCSkinnari Louise0Cornell UniversityThe high luminosity upgrade of the LHC is expected to deliver luminosities of 7.5 × 1034 cm−2s−1, with an average of 140–200 overlapping proton-proton collisions in each bunch crossing at a frequency of 40 MHz. To maintain manageable trigger rates under these conditions track reconstruction will be incorporated in the all-hardware first level of the CMS trigger. A track-finding algorithm based on seed tracklets has been developed and implemented on commercially available FPGAs for this purpose. An overview of the algorithm is presented, results are shown of its expected performance from simulations, and an implementation of the algorithm in a Xilinx Virtex-7 FPGA for a hardware demonstrator system is discussed.http://dx.doi.org/10.1051/epjconf/201612700017
spellingShingle Skinnari Louise
FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
EPJ Web of Conferences
title FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
title_full FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
title_fullStr FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
title_full_unstemmed FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
title_short FPGA-Based Approach to Level-1 Track Finding at CMS for the HL-LHC
title_sort fpga based approach to level 1 track finding at cms for the hl lhc
url http://dx.doi.org/10.1051/epjconf/201612700017
work_keys_str_mv AT skinnarilouise fpgabasedapproachtolevel1trackfindingatcmsforthehllhc