Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation
Abstract The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In th...
| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | English |
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Nature Portfolio
2022-11-01
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| Series: | npj 2D Materials and Applications |
| Online Access: | https://doi.org/10.1038/s41699-022-00353-1 |
| _version_ | 1797984668438495232 |
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| author | Jingfeng Song Yubo Qi Zhiyong Xiao Kun Wang Dawei Li Seung-Hyun Kim Angus I. Kingon Andrew M. Rappe Xia Hong |
| author_facet | Jingfeng Song Yubo Qi Zhiyong Xiao Kun Wang Dawei Li Seung-Hyun Kim Angus I. Kingon Andrew M. Rappe Xia Hong |
| author_sort | Jingfeng Song |
| collection | DOAJ |
| description | Abstract The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In this work, we report steep slope switching in MoS2 transistors back-gated by single-layer polycrystalline PbZr0.35Ti0.65O3. The devices exhibit current switching ratios up to 8 × 106 within an ultra-low gate voltage window of $$V_{{{\mathrm{g}}}} = \pm \! 0.5$$ V g = ± 0.5 V and subthreshold swing (SS) as low as 9.7 mV decade−1 at room temperature, transcending the 60 mV decade−1 Boltzmann limit without involving additional dielectric layers. Theoretical modeling reveals the dominant role of the metastable polar states within domain walls in enabling the NC mode, which is corroborated by the relation between SS and domain wall density. Our findings shed light on a hysteresis-free mechanism for NC operation, providing a simple yet effective material strategy for developing low-power 2D nanoelectronics. |
| first_indexed | 2024-04-11T07:05:31Z |
| format | Article |
| id | doaj.art-4e7ebe3ebeb44a5ba5d71f90d806fc8d |
| institution | Directory Open Access Journal |
| issn | 2397-7132 |
| language | English |
| last_indexed | 2024-04-11T07:05:31Z |
| publishDate | 2022-11-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | npj 2D Materials and Applications |
| spelling | doaj.art-4e7ebe3ebeb44a5ba5d71f90d806fc8d2022-12-22T04:38:23ZengNature Portfolionpj 2D Materials and Applications2397-71322022-11-01611910.1038/s41699-022-00353-1Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operationJingfeng Song0Yubo Qi1Zhiyong Xiao2Kun Wang3Dawei Li4Seung-Hyun Kim5Angus I. Kingon6Andrew M. Rappe7Xia Hong8Department of Physics and Astronomy & Nebraska Center for Materials and Nanoscience, University of Nebraska-LincolnDepartment of Chemistry, University of PennsylvaniaDepartment of Physics and Astronomy & Nebraska Center for Materials and Nanoscience, University of Nebraska-LincolnDepartment of Physics and Astronomy & Nebraska Center for Materials and Nanoscience, University of Nebraska-LincolnDepartment of Physics and Astronomy & Nebraska Center for Materials and Nanoscience, University of Nebraska-LincolnSchool of Engineering, Brown UniversitySchool of Engineering, Brown UniversityDepartment of Chemistry, University of PennsylvaniaDepartment of Physics and Astronomy & Nebraska Center for Materials and Nanoscience, University of Nebraska-LincolnAbstract The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In this work, we report steep slope switching in MoS2 transistors back-gated by single-layer polycrystalline PbZr0.35Ti0.65O3. The devices exhibit current switching ratios up to 8 × 106 within an ultra-low gate voltage window of $$V_{{{\mathrm{g}}}} = \pm \! 0.5$$ V g = ± 0.5 V and subthreshold swing (SS) as low as 9.7 mV decade−1 at room temperature, transcending the 60 mV decade−1 Boltzmann limit without involving additional dielectric layers. Theoretical modeling reveals the dominant role of the metastable polar states within domain walls in enabling the NC mode, which is corroborated by the relation between SS and domain wall density. Our findings shed light on a hysteresis-free mechanism for NC operation, providing a simple yet effective material strategy for developing low-power 2D nanoelectronics.https://doi.org/10.1038/s41699-022-00353-1 |
| spellingShingle | Jingfeng Song Yubo Qi Zhiyong Xiao Kun Wang Dawei Li Seung-Hyun Kim Angus I. Kingon Andrew M. Rappe Xia Hong Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation npj 2D Materials and Applications |
| title | Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation |
| title_full | Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation |
| title_fullStr | Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation |
| title_full_unstemmed | Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation |
| title_short | Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation |
| title_sort | domain wall enabled steep slope switching in mos2 transistors towards hysteresis free operation |
| url | https://doi.org/10.1038/s41699-022-00353-1 |
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