Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS
Hardware accelerated modules that can continuously measure/analyze resource (frequency channels, power, etc.) utilization in real-time can help in achieving efficient network control, and configuration in cloud managed wireless networks. As utilization of various network resources over time often ex...
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Format: | Article |
Language: | English |
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IEEE
2020-01-01
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Series: | IEEE Access |
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Online Access: | https://ieeexplore.ieee.org/document/9020050/ |
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author | Chanaka Ganewattha Zaheer Khan Janne J. Lehtomaki Marja Matinmikko-Blue |
author_facet | Chanaka Ganewattha Zaheer Khan Janne J. Lehtomaki Marja Matinmikko-Blue |
author_sort | Chanaka Ganewattha |
collection | DOAJ |
description | Hardware accelerated modules that can continuously measure/analyze resource (frequency channels, power, etc.) utilization in real-time can help in achieving efficient network control, and configuration in cloud managed wireless networks. As utilization of various network resources over time often exhibits broad and skewed distribution, estimating quantiles of metrics to characterize their distribution is more useful than typical approaches that tend to focus on measuring average values only. In this paper, we describe the development of a real-time quantile-based resource utilization estimator module for wireless networks. The intensive processing tasks run on the FPGA, while the command and control runs on an embedded ARM processor. The module is implemented by using high level synthesis (HLS) on a Xilinx's Zynq-7000 series all programmable system on chip board. We test the performance of the implemented quantile estimator module, and as an example, we focus on forecasting congestion with real frequency channel utilization data. We compare the results from the implemented module against the results from a theoretical quantile estimator. We show that with high accuracy and in real time, the implemented module can perform quantile estimation and can be utilized to perform forecasting of congestion in wireless frequency spectrum utilization. |
first_indexed | 2024-12-17T23:40:15Z |
format | Article |
id | doaj.art-530f86da270f4b4f858b6558b5254383 |
institution | Directory Open Access Journal |
issn | 2169-3536 |
language | English |
last_indexed | 2024-12-17T23:40:15Z |
publishDate | 2020-01-01 |
publisher | IEEE |
record_format | Article |
series | IEEE Access |
spelling | doaj.art-530f86da270f4b4f858b6558b52543832022-12-21T21:28:27ZengIEEEIEEE Access2169-35362020-01-018433014331310.1109/ACCESS.2020.29777609020050Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLSChanaka Ganewattha0https://orcid.org/0000-0002-9865-4971Zaheer Khan1https://orcid.org/0000-0003-2951-5684Janne J. Lehtomaki2https://orcid.org/0000-0002-5081-1843Marja Matinmikko-Blue3https://orcid.org/0000-0002-0094-6344Centre for Wireless Communications (CWC), University of Oulu, Oulu, FinlandCentre for Wireless Communications (CWC), University of Oulu, Oulu, FinlandCentre for Wireless Communications (CWC), University of Oulu, Oulu, FinlandCentre for Wireless Communications (CWC), University of Oulu, Oulu, FinlandHardware accelerated modules that can continuously measure/analyze resource (frequency channels, power, etc.) utilization in real-time can help in achieving efficient network control, and configuration in cloud managed wireless networks. As utilization of various network resources over time often exhibits broad and skewed distribution, estimating quantiles of metrics to characterize their distribution is more useful than typical approaches that tend to focus on measuring average values only. In this paper, we describe the development of a real-time quantile-based resource utilization estimator module for wireless networks. The intensive processing tasks run on the FPGA, while the command and control runs on an embedded ARM processor. The module is implemented by using high level synthesis (HLS) on a Xilinx's Zynq-7000 series all programmable system on chip board. We test the performance of the implemented quantile estimator module, and as an example, we focus on forecasting congestion with real frequency channel utilization data. We compare the results from the implemented module against the results from a theoretical quantile estimator. We show that with high accuracy and in real time, the implemented module can perform quantile estimation and can be utilized to perform forecasting of congestion in wireless frequency spectrum utilization.https://ieeexplore.ieee.org/document/9020050/5Gchannel resource allocationwireless channel congestionforecastingFPGAgeneralized extreme value theory |
spellingShingle | Chanaka Ganewattha Zaheer Khan Janne J. Lehtomaki Marja Matinmikko-Blue Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS IEEE Access 5G channel resource allocation wireless channel congestion forecasting FPGA generalized extreme value theory |
title | Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS |
title_full | Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS |
title_fullStr | Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS |
title_full_unstemmed | Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS |
title_short | Real-Time Quantile-Based Estimation of Resource Utilization on an FPGA Platform Using HLS |
title_sort | real time quantile based estimation of resource utilization on an fpga platform using hls |
topic | 5G channel resource allocation wireless channel congestion forecasting FPGA generalized extreme value theory |
url | https://ieeexplore.ieee.org/document/9020050/ |
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