Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters

A multidimensional systolic arrays realization of LMS algorithm by a method of mapping regular algorithm onto processor array, are designed. They are based on appropriately selected 1-D systolic array filter that depends on the inner product sum systolic implementation. Various arrays may be derived...

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Main Authors: Bakir A. R. Al-Hashemy, Riyadh A.H. AL-Helali
Format: Article
Language:English
Published: Al-Khwarizmi College of Engineering – University of Baghdad 2009-01-01
Series:Al-Khawarizmi Engineering Journal
Subjects:
Online Access:http://www.iasj.net/iasj?func=fulltext&aId=2266
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author Bakir A. R. Al-Hashemy
Riyadh A.H. AL-Helali
author_facet Bakir A. R. Al-Hashemy
Riyadh A.H. AL-Helali
author_sort Bakir A. R. Al-Hashemy
collection DOAJ
description A multidimensional systolic arrays realization of LMS algorithm by a method of mapping regular algorithm onto processor array, are designed. They are based on appropriately selected 1-D systolic array filter that depends on the inner product sum systolic implementation. Various arrays may be derived that exhibit a regular arrangement of the cells (processors) and local interconnection pattern, which are important for VLSI implementation. It reduces latency time and increases the throughput rate in comparison to classical 1-D systolic arrays. The 3-D multilayered array consists of 2-D layers, which are connected with each other only by edges. Such arrays for LMS-based adaptive (FIR) filter may be opposed the fundamental requirements of fast convergence rate in most adaptive filter applications.
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spelling doaj.art-5529feff8a894c4caf45724bdd0f59f12022-12-21T21:02:55ZengAl-Khwarizmi College of Engineering – University of BaghdadAl-Khawarizmi Engineering Journal1818-11712009-01-01518393Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital FiltersBakir A. R. Al-HashemyRiyadh A.H. AL-HelaliA multidimensional systolic arrays realization of LMS algorithm by a method of mapping regular algorithm onto processor array, are designed. They are based on appropriately selected 1-D systolic array filter that depends on the inner product sum systolic implementation. Various arrays may be derived that exhibit a regular arrangement of the cells (processors) and local interconnection pattern, which are important for VLSI implementation. It reduces latency time and increases the throughput rate in comparison to classical 1-D systolic arrays. The 3-D multilayered array consists of 2-D layers, which are connected with each other only by edges. Such arrays for LMS-based adaptive (FIR) filter may be opposed the fundamental requirements of fast convergence rate in most adaptive filter applications.http://www.iasj.net/iasj?func=fulltext&aId=2266Adaptive signal processing; LMS algorithm; VLSI signal processing.
spellingShingle Bakir A. R. Al-Hashemy
Riyadh A.H. AL-Helali
Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
Al-Khawarizmi Engineering Journal
Adaptive signal processing; LMS algorithm; VLSI signal processing.
title Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
title_full Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
title_fullStr Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
title_full_unstemmed Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
title_short Multidimensional Systolic Arrays of LMS AlgorithmAdaptive (FIR) Digital Filters
title_sort multidimensional systolic arrays of lms algorithmadaptive fir digital filters
topic Adaptive signal processing; LMS algorithm; VLSI signal processing.
url http://www.iasj.net/iasj?func=fulltext&aId=2266
work_keys_str_mv AT bakiraralhashemy multidimensionalsystolicarraysoflmsalgorithmadaptivefirdigitalfilters
AT riyadhahalhelali multidimensionalsystolicarraysoflmsalgorithmadaptivefirdigitalfilters