Top-Down Models across CPU Architectures: Applicability and Comparison in a High-Performance Computing Environment
Top-Down models are defined by hardware architects to provide information on the utilization of different hardware components. The target is to isolate the users from the complexity of the hardware architecture while giving them insight into how efficiently the code uses the resources. In this paper...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2023-10-01
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| Series: | Information |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2078-2489/14/10/554 |