The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems
Embedded systems are widely used in various devices. PRES+ (Petri net- based Representation for Embedded Systems) has been used to model and analyze embedded systems. However, it cannot characterize the priority of events, and cannot fully express the complex data flow and control flow. To solve thi...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-04-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/11/9/1389 |
| _version_ | 1797505181637672960 |
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| author | Chuanliang Xia Zhuangzhuang Wang Zhong Wang |
| author_facet | Chuanliang Xia Zhuangzhuang Wang Zhong Wang |
| author_sort | Chuanliang Xia |
| collection | DOAJ |
| description | Embedded systems are widely used in various devices. PRES+ (Petri net- based Representation for Embedded Systems) has been used to model and analyze embedded systems. However, it cannot characterize the priority of events, and cannot fully express the complex data flow and control flow. To solve this problem, inhibitor arcs are added to PRES+ and PIRES+ (PRES+ with Inhibitor arcs) is obtained. However, PIRES+’s state space explosion problem is a handicap when modeling, verifying, and controlling complex, large embedded systems. To mitigate the state space explosion problem of PIRES+ and analyze complex embedded systems, we propose the place refinement approach and the place set refinement approach for PIRES+. Under specific conditions, several important properties of PIRES+, such as timing, functionality, reachability, liveness, and boundedness, are preserved by using these refinement approaches. In order to illustrate the effectiveness of these refinement methods, as an example, the modeling and analysis of a network communication system is proposed. The refinement methods proposed have certain feasibility and practicability and provide a more practical theoretical basis for the modeling of some embedded systems. |
| first_indexed | 2024-03-10T04:14:56Z |
| format | Article |
| id | doaj.art-56a4e0c0de6a4ce79a5d5a52feaece27 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T04:14:56Z |
| publishDate | 2022-04-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-56a4e0c0de6a4ce79a5d5a52feaece272023-11-23T08:02:54ZengMDPI AGElectronics2079-92922022-04-01119138910.3390/electronics11091389The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded SystemsChuanliang Xia0Zhuangzhuang Wang1Zhong Wang2School of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaSchool of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaSchool of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaEmbedded systems are widely used in various devices. PRES+ (Petri net- based Representation for Embedded Systems) has been used to model and analyze embedded systems. However, it cannot characterize the priority of events, and cannot fully express the complex data flow and control flow. To solve this problem, inhibitor arcs are added to PRES+ and PIRES+ (PRES+ with Inhibitor arcs) is obtained. However, PIRES+’s state space explosion problem is a handicap when modeling, verifying, and controlling complex, large embedded systems. To mitigate the state space explosion problem of PIRES+ and analyze complex embedded systems, we propose the place refinement approach and the place set refinement approach for PIRES+. Under specific conditions, several important properties of PIRES+, such as timing, functionality, reachability, liveness, and boundedness, are preserved by using these refinement approaches. In order to illustrate the effectiveness of these refinement methods, as an example, the modeling and analysis of a network communication system is proposed. The refinement methods proposed have certain feasibility and practicability and provide a more practical theoretical basis for the modeling of some embedded systems.https://www.mdpi.com/2079-9292/11/9/1389Petri netsrefinementmodelingreachabilityembedded system design |
| spellingShingle | Chuanliang Xia Zhuangzhuang Wang Zhong Wang The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems Electronics Petri nets refinement modeling reachability embedded system design |
| title | The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems |
| title_full | The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems |
| title_fullStr | The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems |
| title_full_unstemmed | The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems |
| title_short | The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems |
| title_sort | refinement of petri net with inhibitor arcs based representation for embedded systems |
| topic | Petri nets refinement modeling reachability embedded system design |
| url | https://www.mdpi.com/2079-9292/11/9/1389 |
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