Low-Latency Multi-Kernel Polar Decoders

Polar codes have been receiving increased attention for application in beyond 5G networks. They offer low-complexity decoding algorithm and can achieve symmetric channel capacity. However, the majority of research works have focused on the codes constructed by the binary kernel (<inline-formula&g...

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Bibliographic Details
Main Authors: Hossein Rezaei, Nandana Rajatheva, Matti Latva-Aho
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9947089/
Description
Summary:Polar codes have been receiving increased attention for application in beyond 5G networks. They offer low-complexity decoding algorithm and can achieve symmetric channel capacity. However, the majority of research works have focused on the codes constructed by the binary kernel (<inline-formula> <tex-math notation="LaTeX">$2 \times 2$ </tex-math></inline-formula> polarization matrix) which bounds the code length to an integer power of 2. Multi-kernel polar codes have been proposed as a method that allows the construction of polar codes with sizes different from powers of 2 by mixing multiple kernels of different dimensions. A hardware implementation based on the successive cancellation (SC) algorithm found in the literature shows that it suffers from a long decoding latency. In this paper, we design and implement a multi-kernel decoder based on the fast-simplified SC (fast-SSC) algorithm to decrease the decoding latency. It can decode any code constructed by binary and ternary (<inline-formula> <tex-math notation="LaTeX">$3 \times 3$ </tex-math></inline-formula>) kernels featuring flexible code length, code rate, and kernel sequence. FPGA implementation results reveal that a polar code of length <inline-formula> <tex-math notation="LaTeX">$N = 1536$ </tex-math></inline-formula>, rate <inline-formula> <tex-math notation="LaTeX">$\mathcal {R} = 1/2$ </tex-math></inline-formula> with Processing Element (<inline-formula> <tex-math notation="LaTeX">$P_{e}$ </tex-math></inline-formula>) value of <inline-formula> <tex-math notation="LaTeX">$P_{e} = 240$ </tex-math></inline-formula>, gains 84.6&#x0025; lower latency compared to the original algorithm. Also, the architecture supports polar codes constructed by purely-binary and purely-ternary kernels. A polar code of length <inline-formula> <tex-math notation="LaTeX">$N = 1024$ </tex-math></inline-formula>, rate <inline-formula> <tex-math notation="LaTeX">$\mathcal {R} = 1/2$ </tex-math></inline-formula>, and <inline-formula> <tex-math notation="LaTeX">$P_{e} = 120$ </tex-math></inline-formula> achieves an information throughput of 432 Mbps.
ISSN:2169-3536