On Device Architectures, Subthreshold Swing, and Power Consumption of the Piezoelectric Field-Effect Transistor (<inline-formula> <tex-math notation="LaTeX">${\pi }$ </tex-math></inline-formula>-FET)

On Device Architectures, Subthreshold Swing, and Power Consumption of the Piezoelectric Field-Effect Transistor (<inline-formula> <tex-math notation="LaTeX">${\pi }$ </tex-math></inline-formula>-FET)

This paper describes the potential of tunable strain in field-effect transistors to boost performance of digital logic. Voltage-controlled strain can be imposed on a semiconductor body by the integration of a piezoelectric material improving transistor performance. In this paper, we derive the relat...

Full description

Bibliographic Details
Main Authors: Raymond J. E. Hueting, Tom Van Hemert, Buket Kaleli, Rob A. M. Wolters, Jurriaan Schmitz
Format: Article
Language:English
Published: IEEE 2015-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
piezoelectric effect
MOSFET
CMOS
subthermal device
steep-subthreshold device
Online Access:https://ieeexplore.ieee.org/document/7055254/

Similar Items

Similar Items