A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks
Visual sensor networks (VSNs) have numerous applications in fields such as wildlife observation, object recognition, and smart homes. However, visual sensors generate vastly more data than scalar sensors. Storing and transmitting these data is challenging. High-efficiency video coding (HEVC/H.265) i...
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2023-02-01
|
| Series: | Sensors |
| Subjects: | |
| Online Access: | https://www.mdpi.com/1424-8220/23/5/2625 |
| _version_ | 1797614287712157696 |
|---|---|
| author | Chi-Ting Ni Ying-Chia Huang Pei-Yin Chen |
| author_facet | Chi-Ting Ni Ying-Chia Huang Pei-Yin Chen |
| author_sort | Chi-Ting Ni |
| collection | DOAJ |
| description | Visual sensor networks (VSNs) have numerous applications in fields such as wildlife observation, object recognition, and smart homes. However, visual sensors generate vastly more data than scalar sensors. Storing and transmitting these data is challenging. High-efficiency video coding (HEVC/H.265) is a widely used video compression standard. Compare to H.264/AVC, HEVC reduces approximately 50% of the bit rate at the same video quality, which can compress the visual data with a high compression ratio but results in high computational complexity. In this study, we propose a hardware-friendly and high-efficiency H.265/HEVC accelerating algorithm to overcome this complexity for visual sensor networks. The proposed method leverages texture direction and complexity to skip redundant processing in CU partition and accelerate intra prediction for intra-frame encoding. Experimental results revealed that the proposed method could reduce encoding time by 45.33% and increase the Bjontegaard delta bit rate (BDBR) by only 1.07% as compared to HM16.22 under all-intra configuration. Moreover, the proposed method reduced the encoding time for six visual sensor video sequences by 53.72%. These results confirm that the proposed method achieves high efficiency and a favorable balance between the BDBR and encoding time reduction. |
| first_indexed | 2024-03-11T07:10:21Z |
| format | Article |
| id | doaj.art-5a982e86824b47f7aa7e8e88c9c2ccd7 |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-03-11T07:10:21Z |
| publishDate | 2023-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-5a982e86824b47f7aa7e8e88c9c2ccd72023-11-17T08:37:23ZengMDPI AGSensors1424-82202023-02-01235262510.3390/s23052625A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor NetworksChi-Ting Ni0Ying-Chia Huang1Pei-Yin Chen2Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan 70101, TaiwanDepartment of Computer Science and Information Engineering, National Cheng Kung University, Tainan 70101, TaiwanDepartment of Computer Science and Information Engineering, National Cheng Kung University, Tainan 70101, TaiwanVisual sensor networks (VSNs) have numerous applications in fields such as wildlife observation, object recognition, and smart homes. However, visual sensors generate vastly more data than scalar sensors. Storing and transmitting these data is challenging. High-efficiency video coding (HEVC/H.265) is a widely used video compression standard. Compare to H.264/AVC, HEVC reduces approximately 50% of the bit rate at the same video quality, which can compress the visual data with a high compression ratio but results in high computational complexity. In this study, we propose a hardware-friendly and high-efficiency H.265/HEVC accelerating algorithm to overcome this complexity for visual sensor networks. The proposed method leverages texture direction and complexity to skip redundant processing in CU partition and accelerate intra prediction for intra-frame encoding. Experimental results revealed that the proposed method could reduce encoding time by 45.33% and increase the Bjontegaard delta bit rate (BDBR) by only 1.07% as compared to HM16.22 under all-intra configuration. Moreover, the proposed method reduced the encoding time for six visual sensor video sequences by 53.72%. These results confirm that the proposed method achieves high efficiency and a favorable balance between the BDBR and encoding time reduction.https://www.mdpi.com/1424-8220/23/5/2625visual sensor networksHEVCfast CU partitiontexture basedhardware friendly |
| spellingShingle | Chi-Ting Ni Ying-Chia Huang Pei-Yin Chen A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks Sensors visual sensor networks HEVC fast CU partition texture based hardware friendly |
| title | A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks |
| title_full | A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks |
| title_fullStr | A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks |
| title_full_unstemmed | A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks |
| title_short | A Hardware-Friendlyand High-Efficiency H.265/HEVC Encoder for Visual Sensor Networks |
| title_sort | hardware friendlyand high efficiency h 265 hevc encoder for visual sensor networks |
| topic | visual sensor networks HEVC fast CU partition texture based hardware friendly |
| url | https://www.mdpi.com/1424-8220/23/5/2625 |
| work_keys_str_mv | AT chitingni ahardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks AT yingchiahuang ahardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks AT peiyinchen ahardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks AT chitingni hardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks AT yingchiahuang hardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks AT peiyinchen hardwarefriendlyandhighefficiencyh265hevcencoderforvisualsensornetworks |