Simulation-based Verification of System-on-Chip Bus Controllers
The paper presents an approach to verification of commutation components of Systems-on-Chip. The core idea is to verify bus controllers and supporting interface parts connected to a reference model at unit-level. The reference model in the approach is suggested to be written in SystemC so that to be...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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Ivannikov Institute for System Programming of the Russian Academy of Sciences
2018-10-01
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| Series: | Труды Института системного программирования РАН |
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| Online Access: | https://ispranproceedings.elpub.ru/jour/article/view/559 |
| _version_ | 1818806952488075264 |
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| author | M. M. Chupilko E. A. Drozdova |
| author_facet | M. M. Chupilko E. A. Drozdova |
| author_sort | M. M. Chupilko |
| collection | DOAJ |
| description | The paper presents an approach to verification of commutation components of Systems-on-Chip. The core idea is to verify bus controllers and supporting interface parts connected to a reference model at unit-level. The reference model in the approach is suggested to be written in SystemC so that to be easily adjusted to the required bus parameters. The in-house prototype implementing the approach has been applied to the verification of a Verilog model of Wishbone controller. There is a possibility to extend the approach to support other busses and protocols by development of the interface library. |
| first_indexed | 2024-12-18T19:17:57Z |
| format | Article |
| id | doaj.art-5afa267586cc4556b38387c0420c9df6 |
| institution | Directory Open Access Journal |
| issn | 2079-8156 2220-6426 |
| language | English |
| last_indexed | 2024-12-18T19:17:57Z |
| publishDate | 2018-10-01 |
| publisher | Ivannikov Institute for System Programming of the Russian Academy of Sciences |
| record_format | Article |
| series | Труды Института системного программирования РАН |
| spelling | doaj.art-5afa267586cc4556b38387c0420c9df62022-12-21T20:56:04ZengIvannikov Institute for System Programming of the Russian Academy of SciencesТруды Института системного программирования РАН2079-81562220-64262018-10-0130412913810.15514/ISPRAS-2018-30(4)-8559Simulation-based Verification of System-on-Chip Bus ControllersM. M. Chupilko0E. A. Drozdova1Институт системного программирования им. В.П. Иванникова РАНМосковский государственный университет им. М.В. ЛомоносоваThe paper presents an approach to verification of commutation components of Systems-on-Chip. The core idea is to verify bus controllers and supporting interface parts connected to a reference model at unit-level. The reference model in the approach is suggested to be written in SystemC so that to be easily adjusted to the required bus parameters. The in-house prototype implementing the approach has been applied to the verification of a Verilog model of Wishbone controller. There is a possibility to extend the approach to support other busses and protocols by development of the interface library.https://ispranproceedings.elpub.ru/jour/article/view/559модульная верификацияc++tesk |
| spellingShingle | M. M. Chupilko E. A. Drozdova Simulation-based Verification of System-on-Chip Bus Controllers Труды Института системного программирования РАН модульная верификация c++tesk |
| title | Simulation-based Verification of System-on-Chip Bus Controllers |
| title_full | Simulation-based Verification of System-on-Chip Bus Controllers |
| title_fullStr | Simulation-based Verification of System-on-Chip Bus Controllers |
| title_full_unstemmed | Simulation-based Verification of System-on-Chip Bus Controllers |
| title_short | Simulation-based Verification of System-on-Chip Bus Controllers |
| title_sort | simulation based verification of system on chip bus controllers |
| topic | модульная верификация c++tesk |
| url | https://ispranproceedings.elpub.ru/jour/article/view/559 |
| work_keys_str_mv | AT mmchupilko simulationbasedverificationofsystemonchipbuscontrollers AT eadrozdova simulationbasedverificationofsystemonchipbuscontrollers |