Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA
Sphere detector (SD) is an effective signal detection approach for the wireless multiple-input multiple-output (MIMO) system since it can achieve near-optimal performance while reducing significant computational complexity. In this work, we proposed a novel SD architecture that is suitable for impl...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
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European Alliance for Innovation (EAI)
2023-03-01
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| Series: | EAI Endorsed Transactions on Industrial Networks and Intelligent Systems |
| Subjects: | |
| Online Access: | https://publications.eai.eu/index.php/inis/article/view/2630 |
| _version_ | 1797857415838826496 |
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| author | Minh Thuong Nguyen Xuan Nam Tran Vu Duc Ngo Quang-Kien Trinh Duc Thang Nguyen Tien Anh Vu |
| author_facet | Minh Thuong Nguyen Xuan Nam Tran Vu Duc Ngo Quang-Kien Trinh Duc Thang Nguyen Tien Anh Vu |
| author_sort | Minh Thuong Nguyen |
| collection | DOAJ |
| description |
Sphere detector (SD) is an effective signal detection approach for the wireless multiple-input multiple-output (MIMO) system since it can achieve near-optimal performance while reducing significant computational complexity. In this work, we proposed a novel SD architecture that is suitable for implementation on the hardware accelerator. We first perform a statistical analysis to examine the distribution of valid paths in the SD search tree. Using the analysis result, we then proposed an enhanced hybrid SD (EHSD) architecture that achieves quasi-ML performance and high throughput with a reasonable cost in hardware. The fine-grained pipeline designs of 4 × 4 and 8 × 8 MIMO system with 16-QAM modulation delivers throughput of 7.04 Gbps and 14.08 Gbps on the Xilinx Virtex Ultrascale+ FPGA, respectively.
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| first_indexed | 2024-04-09T20:56:21Z |
| format | Article |
| id | doaj.art-5cc318c54c1c41678dcf1a93728bfe40 |
| institution | Directory Open Access Journal |
| issn | 2410-0218 |
| language | English |
| last_indexed | 2024-04-09T20:56:21Z |
| publishDate | 2023-03-01 |
| publisher | European Alliance for Innovation (EAI) |
| record_format | Article |
| series | EAI Endorsed Transactions on Industrial Networks and Intelligent Systems |
| spelling | doaj.art-5cc318c54c1c41678dcf1a93728bfe402023-03-29T17:24:11ZengEuropean Alliance for Innovation (EAI)EAI Endorsed Transactions on Industrial Networks and Intelligent Systems2410-02182023-03-0110110.4108/eetinis.v10i1.2630Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGAMinh Thuong Nguyen0Xuan Nam Tran1Vu Duc Ngo2Quang-Kien Trinh3Duc Thang Nguyen4Tien Anh Vu5Military Information Technology Institute, Hanoi, VietnamLe Quy Don Technical University Hanoi University of Science and Technology Le Quy Don Technical University Le Quy Don Technical University Le Quy Don Technical University Sphere detector (SD) is an effective signal detection approach for the wireless multiple-input multiple-output (MIMO) system since it can achieve near-optimal performance while reducing significant computational complexity. In this work, we proposed a novel SD architecture that is suitable for implementation on the hardware accelerator. We first perform a statistical analysis to examine the distribution of valid paths in the SD search tree. Using the analysis result, we then proposed an enhanced hybrid SD (EHSD) architecture that achieves quasi-ML performance and high throughput with a reasonable cost in hardware. The fine-grained pipeline designs of 4 × 4 and 8 × 8 MIMO system with 16-QAM modulation delivers throughput of 7.04 Gbps and 14.08 Gbps on the Xilinx Virtex Ultrascale+ FPGA, respectively. https://publications.eai.eu/index.php/inis/article/view/2630SDM-MIMOSphere DetectionK-bestMIMOFPGASub-Optimal |
| spellingShingle | Minh Thuong Nguyen Xuan Nam Tran Vu Duc Ngo Quang-Kien Trinh Duc Thang Nguyen Tien Anh Vu Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA EAI Endorsed Transactions on Industrial Networks and Intelligent Systems SDM-MIMO Sphere Detection K-best MIMO FPGA Sub-Optimal |
| title | Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA |
| title_full | Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA |
| title_fullStr | Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA |
| title_full_unstemmed | Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA |
| title_short | Sub-optimal Deep Pipelined Implementation of MIMO Sphere Detector on FPGA |
| title_sort | sub optimal deep pipelined implementation of mimo sphere detector on fpga |
| topic | SDM-MIMO Sphere Detection K-best MIMO FPGA Sub-Optimal |
| url | https://publications.eai.eu/index.php/inis/article/view/2630 |
| work_keys_str_mv | AT minhthuongnguyen suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga AT xuannamtran suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga AT vuducngo suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga AT quangkientrinh suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga AT ducthangnguyen suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga AT tienanhvu suboptimaldeeppipelinedimplementationofmimospheredetectoronfpga |