Pinch-off mechanism in double-lateral-gate junctionless transistors fabricated by scanning probe microscope based lithography
A double-lateral-gate p-type junctionless transistor is fabricated on a low-doped (1015) silicon-on-insulator wafer by a lithography technique based on scanning probe microscopy and two steps of wet chemical etching. The experimental transfer characteristics are obtained and compared with the numeri...
| Main Authors: | , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Beilstein-Institut
2012-12-01
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| Series: | Beilstein Journal of Nanotechnology |
| Subjects: | |
| Online Access: | https://doi.org/10.3762/bjnano.3.91 |