Formal Verification of Real-Time System Requirements

The methodology of system requirements verification presented in this paper is a proposition of a practical procedure for reducing some negatives of the specification of requirements. The main problem that is considered is to create a complete description of the system requirements without any negat...

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Main Author: Marcin Szpyrka
Format: Article
Language:English
Published: AGH University of Science and Technology Press 2000-01-01
Series:Computer Science
Subjects:
Online Access:http://www.csci.agh.edu.pl/25/1/cs2000%2D05.pdf
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author Marcin Szpyrka
author_facet Marcin Szpyrka
author_sort Marcin Szpyrka
collection DOAJ
description The methodology of system requirements verification presented in this paper is a proposition of a practical procedure for reducing some negatives of the specification of requirements. The main problem that is considered is to create a complete description of the system requirements without any negatives. Verification of the initially defined requirements is based on the coloured Petri nets. Those nets are useful for testing some properties of system requirements such as completeness, consistency and optimality. An example ofthe litt controller is presented.
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spelling doaj.art-5dad22f3aa4247cf9d020290c7995aed2022-12-21T21:14:21ZengAGH University of Science and Technology PressComputer Science1508-28062000-01-0121109129Formal Verification of Real-Time System RequirementsMarcin SzpyrkaThe methodology of system requirements verification presented in this paper is a proposition of a practical procedure for reducing some negatives of the specification of requirements. The main problem that is considered is to create a complete description of the system requirements without any negatives. Verification of the initially defined requirements is based on the coloured Petri nets. Those nets are useful for testing some properties of system requirements such as completeness, consistency and optimality. An example ofthe litt controller is presented.http://www.csci.agh.edu.pl/25/1/cs2000%2D05.pdfReal-time systems
spellingShingle Marcin Szpyrka
Formal Verification of Real-Time System Requirements
Computer Science
Real-time systems
title Formal Verification of Real-Time System Requirements
title_full Formal Verification of Real-Time System Requirements
title_fullStr Formal Verification of Real-Time System Requirements
title_full_unstemmed Formal Verification of Real-Time System Requirements
title_short Formal Verification of Real-Time System Requirements
title_sort formal verification of real time system requirements
topic Real-time systems
url http://www.csci.agh.edu.pl/25/1/cs2000%2D05.pdf
work_keys_str_mv AT marcinszpyrka formalverificationofrealtimesystemrequirements