Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform
Software-based technical indicators have been widely used for the stock market forecasting, aiming to predict market direction. Even though many algorithms for the software based technical indicators are presented, there are almost no hardware implementations reported in the literature. In this pape...
| Main Authors: | , , , , , , , |
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| Format: | Article |
| Language: | English |
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Elsevier
2024-06-01
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| Series: | Alexandria Engineering Journal |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S1110016824003119 |
| _version_ | 1797220597547139072 |
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| author | Abbas Ali Abdullah Shah Azaz Hassan Khan Malik Umar Sharif Zaka Ullah Zahid Rabia Shahid Tariqullah Jan Mohammad Haseeb Zafar |
| author_facet | Abbas Ali Abdullah Shah Azaz Hassan Khan Malik Umar Sharif Zaka Ullah Zahid Rabia Shahid Tariqullah Jan Mohammad Haseeb Zafar |
| author_sort | Abbas Ali |
| collection | DOAJ |
| description | Software-based technical indicators have been widely used for the stock market forecasting, aiming to predict market direction. Even though many algorithms for the software based technical indicators are presented, there are almost no hardware implementations reported in the literature. In this paper, the hardware implementation is presented for three commonly used technical indicators: Moving Average Convergence/Divergence (MACD), Relative Strength Index (RSI), and Aroon. Latency evaluation is conducted for Bitcoin and Ethereum within a single-day timeframe, utilizing the Xilinx Zynq-7000 programmable SoC XC7Z020-CLG484-1 platform.Additionally, various hardware/software (HW/SW) partitioning strategies are explored to leverage the flexibility of software alongside the performance advantages of hardware via the Zynq SoC platform. The results show that the best performing technical indicator is MACD with a speedup of 30 times over its software only counterpart. Furthermore, a hybrid design integrating multiple technical indicators is proposed, pairing MACD with RSI due to their competitive throughput values, differing by only 0.38 microseconds. This hybrid approach capitalizes on the parallel processing capabilities of hardware, enabling multiple systems to operate simultaneously. |
| first_indexed | 2024-04-24T12:52:04Z |
| format | Article |
| id | doaj.art-5ebb1edb2cba4c32940e111990de78ac |
| institution | Directory Open Access Journal |
| issn | 1110-0168 |
| language | English |
| last_indexed | 2024-04-24T12:52:04Z |
| publishDate | 2024-06-01 |
| publisher | Elsevier |
| record_format | Article |
| series | Alexandria Engineering Journal |
| spelling | doaj.art-5ebb1edb2cba4c32940e111990de78ac2024-04-06T04:39:31ZengElsevierAlexandria Engineering Journal1110-01682024-06-0196114Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platformAbbas Ali0Abdullah Shah1Azaz Hassan Khan2Malik Umar Sharif3Zaka Ullah Zahid4Rabia Shahid5Tariqullah Jan6Mohammad Haseeb Zafar7Department of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering and Computer Science, Jalozai Campus, University of Engineering and Technology, Peshawar, 25000, PakistanDepartment of Electrical Engineering, Main Campus, University of Engineering and Technology, Peshawar, 25000, PakistanCardiff School of Technologies, Cardiff Metropolitan University, Cardiff, CF52YB, UK; Corresponding author.Software-based technical indicators have been widely used for the stock market forecasting, aiming to predict market direction. Even though many algorithms for the software based technical indicators are presented, there are almost no hardware implementations reported in the literature. In this paper, the hardware implementation is presented for three commonly used technical indicators: Moving Average Convergence/Divergence (MACD), Relative Strength Index (RSI), and Aroon. Latency evaluation is conducted for Bitcoin and Ethereum within a single-day timeframe, utilizing the Xilinx Zynq-7000 programmable SoC XC7Z020-CLG484-1 platform.Additionally, various hardware/software (HW/SW) partitioning strategies are explored to leverage the flexibility of software alongside the performance advantages of hardware via the Zynq SoC platform. The results show that the best performing technical indicator is MACD with a speedup of 30 times over its software only counterpart. Furthermore, a hybrid design integrating multiple technical indicators is proposed, pairing MACD with RSI due to their competitive throughput values, differing by only 0.38 microseconds. This hybrid approach capitalizes on the parallel processing capabilities of hardware, enabling multiple systems to operate simultaneously.http://www.sciencedirect.com/science/article/pii/S1110016824003119System-on-ChipHigh-frequency tradingXilinx Zynq-7000HW/SW co-designTechnical indicatorsCryptocurrencies |
| spellingShingle | Abbas Ali Abdullah Shah Azaz Hassan Khan Malik Umar Sharif Zaka Ullah Zahid Rabia Shahid Tariqullah Jan Mohammad Haseeb Zafar Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform Alexandria Engineering Journal System-on-Chip High-frequency trading Xilinx Zynq-7000 HW/SW co-design Technical indicators Cryptocurrencies |
| title | Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform |
| title_full | Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform |
| title_fullStr | Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform |
| title_full_unstemmed | Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform |
| title_short | Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform |
| title_sort | speed vs efficiency a framework for high frequency trading algorithms on fpga using zynq soc platform |
| topic | System-on-Chip High-frequency trading Xilinx Zynq-7000 HW/SW co-design Technical indicators Cryptocurrencies |
| url | http://www.sciencedirect.com/science/article/pii/S1110016824003119 |
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