DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling

In this paper, we present a novel scheduling solution for a class of System-on-Chip (SoC) systems where heterogeneous chip resources (DSP, FPGA, GPU, etc.) must be efficiently scheduled for continuously arriving hierarchical jobs with their tasks represented by a directed acyclic graph. Traditionall...

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Main Authors: Tegg Taekyong Sung, Jeongsoo Ha, Jeewoo Kim, Alex Yahja, Chae-Bong Sohn, Bo Ryu
Format: Article
Language:English
Published: MDPI AG 2020-06-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/9/6/936
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author Tegg Taekyong Sung
Jeongsoo Ha
Jeewoo Kim
Alex Yahja
Chae-Bong Sohn
Bo Ryu
author_facet Tegg Taekyong Sung
Jeongsoo Ha
Jeewoo Kim
Alex Yahja
Chae-Bong Sohn
Bo Ryu
author_sort Tegg Taekyong Sung
collection DOAJ
description In this paper, we present a novel scheduling solution for a class of System-on-Chip (SoC) systems where heterogeneous chip resources (DSP, FPGA, GPU, etc.) must be efficiently scheduled for continuously arriving hierarchical jobs with their tasks represented by a directed acyclic graph. Traditionally, heuristic algorithms have been widely used for many resource scheduling domains, and Heterogeneous Earliest Finish Time (HEFT) has been a dominating state-of-the-art technique across a broad range of heterogeneous resource scheduling domains over many years. Despite their long-standing popularity, HEFT-like algorithms are known to be vulnerable to a small amount of noise added to the environment. Our Deep Reinforcement Learning (DRL)-based SoC Scheduler (DeepSoCS), capable of learning the “best” task ordering under dynamic environment changes, overcomes the brittleness of rule-based schedulers such as HEFT with significantly higher performance across different types of jobs. We describe a DeepSoCS design process using a real-time heterogeneous SoC scheduling emulator, discuss major challenges, and present two novel neural network design features that lead to outperforming HEFT: (i) hierarchical job- and task-graph embedding; and (ii) efficient use of real-time task information in the state space. Furthermore, we introduce effective techniques to address two fundamental challenges present in our environment: delayed consequences and joint actions. Through an extensive simulation study, we show that our DeepSoCS exhibits the significantly higher performance of job execution time than that of HEFT with a higher level of robustness under realistic noise conditions. We conclude with a discussion of the potential improvements for our DeepSoCS neural scheduler.
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spelling doaj.art-5ec28a4377e84b7fbe88bb2f21f398772023-11-20T02:53:41ZengMDPI AGElectronics2079-92922020-06-019693610.3390/electronics9060936DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource SchedulingTegg Taekyong Sung0Jeongsoo Ha1Jeewoo Kim2Alex Yahja3Chae-Bong Sohn4Bo Ryu5Department of Electronics and Communications Engineering, Kwangwoon University, Seoul 01897, KoreaDepartment of Computer Science and Engineering, Chungnam National University, Daejeon 34134, KoreaDepartment of Computing, Imperial College London, London SW7 2AZ, UKEpiSys Science, Poway, CA 92064, USADepartment of Electronics and Communications Engineering, Kwangwoon University, Seoul 01897, KoreaEpiSys Science, Poway, CA 92064, USAIn this paper, we present a novel scheduling solution for a class of System-on-Chip (SoC) systems where heterogeneous chip resources (DSP, FPGA, GPU, etc.) must be efficiently scheduled for continuously arriving hierarchical jobs with their tasks represented by a directed acyclic graph. Traditionally, heuristic algorithms have been widely used for many resource scheduling domains, and Heterogeneous Earliest Finish Time (HEFT) has been a dominating state-of-the-art technique across a broad range of heterogeneous resource scheduling domains over many years. Despite their long-standing popularity, HEFT-like algorithms are known to be vulnerable to a small amount of noise added to the environment. Our Deep Reinforcement Learning (DRL)-based SoC Scheduler (DeepSoCS), capable of learning the “best” task ordering under dynamic environment changes, overcomes the brittleness of rule-based schedulers such as HEFT with significantly higher performance across different types of jobs. We describe a DeepSoCS design process using a real-time heterogeneous SoC scheduling emulator, discuss major challenges, and present two novel neural network design features that lead to outperforming HEFT: (i) hierarchical job- and task-graph embedding; and (ii) efficient use of real-time task information in the state space. Furthermore, we introduce effective techniques to address two fundamental challenges present in our environment: delayed consequences and joint actions. Through an extensive simulation study, we show that our DeepSoCS exhibits the significantly higher performance of job execution time than that of HEFT with a higher level of robustness under realistic noise conditions. We conclude with a discussion of the potential improvements for our DeepSoCS neural scheduler.https://www.mdpi.com/2079-9292/9/6/936heterogeneous resource schedulingdeep reinforcement learningneural networkssystem on chip
spellingShingle Tegg Taekyong Sung
Jeongsoo Ha
Jeewoo Kim
Alex Yahja
Chae-Bong Sohn
Bo Ryu
DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
Electronics
heterogeneous resource scheduling
deep reinforcement learning
neural networks
system on chip
title DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
title_full DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
title_fullStr DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
title_full_unstemmed DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
title_short DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling
title_sort deepsocs a neural scheduler for heterogeneous system on chip soc resource scheduling
topic heterogeneous resource scheduling
deep reinforcement learning
neural networks
system on chip
url https://www.mdpi.com/2079-9292/9/6/936
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