On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS
The work reports on the development of a detailed noise current model for a low-noise capacitive feedback transimpedance amplifier (TIA) in CMOS. The proposed TIA circuit implements the programmable-gain using an array of discretely controlled feedback capacitors and resistances in the biasing circu...
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-10-01
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| Series: | Applied Sciences |
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| Online Access: | https://www.mdpi.com/2076-3417/12/19/10186 |
| _version_ | 1827654996166967296 |
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| author | Agata Romanova Vaidotas Barzdenas |
| author_facet | Agata Romanova Vaidotas Barzdenas |
| author_sort | Agata Romanova |
| collection | DOAJ |
| description | The work reports on the development of a detailed noise current model for a low-noise capacitive feedback transimpedance amplifier (TIA) in CMOS. The proposed TIA circuit implements the programmable-gain using an array of discretely controlled feedback capacitors and resistances in the biasing circuit and is originally designed bearing in mind low-noise requirements for optical time-domain reflectometer (OTDR) applications with the base gain of 10 kΩ at 1 GHz bandwidth and noise levels below 5.0 pA/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msqrt><mi>Hz</mi></msqrt></semantics></math></inline-formula>. The newly developed model for input-referred noise current spectral density complements the previously suggested transimpedance gain model and takes into account both the primary and secondary noise sources so far ignored in the models known in the literature. The proposed noise model consists of five terms and includes the effects caused by biasing components of the input stage and the noise shaping from the source follower. The performance of the developed noise model is evaluated using the post-layout simulation in 0.18 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>m CMOS and 0.25 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>m BiCMOS technologies, and a close match of the proposed model is demonstrated in the results of the post-layout simulation with the noise level below 1.8 pA/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msqrt><mi>Hz</mi></msqrt></semantics></math></inline-formula> for the base gain configuration in CMOS. A comparison to available noise models from the literature confirms that previously known noise models for this promising TIA architecture omitted important noise components present in practical and physically realizable circuits and, therefore, resulted in underestimating the base noise level by a factor of two to three, while completely ignoring the flicker noise mapping in the low-frequency range. |
| first_indexed | 2024-03-09T21:59:32Z |
| format | Article |
| id | doaj.art-5f0a5deda43b438f93d0ff162544523f |
| institution | Directory Open Access Journal |
| issn | 2076-3417 |
| language | English |
| last_indexed | 2024-03-09T21:59:32Z |
| publishDate | 2022-10-01 |
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| series | Applied Sciences |
| spelling | doaj.art-5f0a5deda43b438f93d0ff162544523f2023-11-23T19:52:29ZengMDPI AGApplied Sciences2076-34172022-10-0112191018610.3390/app121910186On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOSAgata Romanova0Vaidotas Barzdenas1Department of Computer Science and Communications Technologies, Vilnius Gediminas Technical University (VILNIUS TECH), Sauletekio al. 11, 10223 Vilnius, LithuaniaDepartment of Computer Science and Communications Technologies, Vilnius Gediminas Technical University (VILNIUS TECH), Sauletekio al. 11, 10223 Vilnius, LithuaniaThe work reports on the development of a detailed noise current model for a low-noise capacitive feedback transimpedance amplifier (TIA) in CMOS. The proposed TIA circuit implements the programmable-gain using an array of discretely controlled feedback capacitors and resistances in the biasing circuit and is originally designed bearing in mind low-noise requirements for optical time-domain reflectometer (OTDR) applications with the base gain of 10 kΩ at 1 GHz bandwidth and noise levels below 5.0 pA/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msqrt><mi>Hz</mi></msqrt></semantics></math></inline-formula>. The newly developed model for input-referred noise current spectral density complements the previously suggested transimpedance gain model and takes into account both the primary and secondary noise sources so far ignored in the models known in the literature. The proposed noise model consists of five terms and includes the effects caused by biasing components of the input stage and the noise shaping from the source follower. The performance of the developed noise model is evaluated using the post-layout simulation in 0.18 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>m CMOS and 0.25 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>m BiCMOS technologies, and a close match of the proposed model is demonstrated in the results of the post-layout simulation with the noise level below 1.8 pA/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msqrt><mi>Hz</mi></msqrt></semantics></math></inline-formula> for the base gain configuration in CMOS. A comparison to available noise models from the literature confirms that previously known noise models for this promising TIA architecture omitted important noise components present in practical and physically realizable circuits and, therefore, resulted in underestimating the base noise level by a factor of two to three, while completely ignoring the flicker noise mapping in the low-frequency range.https://www.mdpi.com/2076-3417/12/19/10186capacitive feedbackCMOS integrated circuitslow-noise amplifiersnoise modelingoptical time-domain reflectometrytransimpedance amplifiers |
| spellingShingle | Agata Romanova Vaidotas Barzdenas On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS Applied Sciences capacitive feedback CMOS integrated circuits low-noise amplifiers noise modeling optical time-domain reflectometry transimpedance amplifiers |
| title | On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS |
| title_full | On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS |
| title_fullStr | On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS |
| title_full_unstemmed | On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS |
| title_short | On Noise Modeling of Capacitive Feedback Transimpedance Amplifiers in CMOS |
| title_sort | on noise modeling of capacitive feedback transimpedance amplifiers in cmos |
| topic | capacitive feedback CMOS integrated circuits low-noise amplifiers noise modeling optical time-domain reflectometry transimpedance amplifiers |
| url | https://www.mdpi.com/2076-3417/12/19/10186 |
| work_keys_str_mv | AT agataromanova onnoisemodelingofcapacitivefeedbacktransimpedanceamplifiersincmos AT vaidotasbarzdenas onnoisemodelingofcapacitivefeedbacktransimpedanceamplifiersincmos |