The SPEEDY Family of Block Ciphers
We introduce SPEEDY, a family of ultra low-latency block ciphers. We mix engineering expertise into each step of the cipher’s design process in order to create a secure encryption primitive with an extremely low latency in CMOS hardware. The centerpiece of our constructions is a high-speed 6-bit sub...
| Main Authors: | , , , |
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| פורמט: | Article |
| שפה: | English |
| יצא לאור: |
Ruhr-Universität Bochum
2021-08-01
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| סדרה: | Transactions on Cryptographic Hardware and Embedded Systems |
| נושאים: | |
| גישה מקוונת: | https://tches.iacr.org/index.php/TCHES/article/view/9074 |