FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS
High-Level Synthesis (HLS) tools provide facilities for the development of specialized hardware accelerators (HWacc). However, the verification stage is still the longest phase in the development life-cycle. Unlike in the software industry, HLS tools lack testing frameworks that could cover the whol...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2020-11-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/9/12/2024 |
| _version_ | 1797546165068103680 |
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| author | Julián Caba Fernando Rincón Jesús Barba José Antonio de la Torre Juan Carlos López |
| author_facet | Julián Caba Fernando Rincón Jesús Barba José Antonio de la Torre Juan Carlos López |
| author_sort | Julián Caba |
| collection | DOAJ |
| description | High-Level Synthesis (HLS) tools provide facilities for the development of specialized hardware accelerators (HWacc). However, the verification stage is still the longest phase in the development life-cycle. Unlike in the software industry, HLS tools lack testing frameworks that could cover the whole design flow, especially the on-board verification stage of the generated RTL. This work introduces a framework for on-board verification of HLS-based modules by using reconfigurable systems and Docker containers with the aim to automate the verification process and preserve a clean testing environment, making the testbed reusable across different stages of the design flow. Moreover, our solution features a mechanism to check timing requirements of the HWacc. We have applied our solution to the C-kernels of the CHStone Benchmark on a Zedboard, in which the on-board verification process has been accelerated up to four times. |
| first_indexed | 2024-03-10T14:26:12Z |
| format | Article |
| id | doaj.art-650febf47bd14044a0a9b1bc8a2b37ed |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T14:26:12Z |
| publishDate | 2020-11-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-650febf47bd14044a0a9b1bc8a2b37ed2023-11-20T22:59:15ZengMDPI AGElectronics2079-92922020-11-01912202410.3390/electronics9122024FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLSJulián Caba0Fernando Rincón1Jesús Barba2José Antonio de la Torre3Juan Carlos López4School of Computer Science, University of Castilla-La Mancha, 13071 Ciudad Real, SpainSchool of Computer Science, University of Castilla-La Mancha, 13071 Ciudad Real, SpainSchool of Computer Science, University of Castilla-La Mancha, 13071 Ciudad Real, SpainSchool of Computer Science, University of Castilla-La Mancha, 13071 Ciudad Real, SpainSchool of Computer Science, University of Castilla-La Mancha, 13071 Ciudad Real, SpainHigh-Level Synthesis (HLS) tools provide facilities for the development of specialized hardware accelerators (HWacc). However, the verification stage is still the longest phase in the development life-cycle. Unlike in the software industry, HLS tools lack testing frameworks that could cover the whole design flow, especially the on-board verification stage of the generated RTL. This work introduces a framework for on-board verification of HLS-based modules by using reconfigurable systems and Docker containers with the aim to automate the verification process and preserve a clean testing environment, making the testbed reusable across different stages of the design flow. Moreover, our solution features a mechanism to check timing requirements of the HWacc. We have applied our solution to the C-kernels of the CHStone Benchmark on a Zedboard, in which the on-board verification process has been accelerated up to four times.https://www.mdpi.com/2079-9292/9/12/2024Field-Programmable Gate Arrays (FPGA)high-level synthesison-board verificationtestingdocker |
| spellingShingle | Julián Caba Fernando Rincón Jesús Barba José Antonio de la Torre Juan Carlos López FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS Electronics Field-Programmable Gate Arrays (FPGA) high-level synthesis on-board verification testing docker |
| title | FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS |
| title_full | FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS |
| title_fullStr | FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS |
| title_full_unstemmed | FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS |
| title_short | FPGA-Based Solution for On-Board Verification of Hardware Modules Using HLS |
| title_sort | fpga based solution for on board verification of hardware modules using hls |
| topic | Field-Programmable Gate Arrays (FPGA) high-level synthesis on-board verification testing docker |
| url | https://www.mdpi.com/2079-9292/9/12/2024 |
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