Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator
Improved performance operational amplifier demand has continuously increased. IC designers use the charge pump technique as an advanced solution to implement the amplifier’s rail−to−rail input stage, but the need for a large load capacitor is a serious downside. To reduce this passive component valu...
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MDPI AG
2023-01-01
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Series: | Electronics |
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Online Access: | https://www.mdpi.com/2079-9292/12/3/507 |
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author | Cristian Stancu Andrei Neacsu Ovidiu Profirescu Dragos Dobrescu Lidia Dobrescu |
author_facet | Cristian Stancu Andrei Neacsu Ovidiu Profirescu Dragos Dobrescu Lidia Dobrescu |
author_sort | Cristian Stancu |
collection | DOAJ |
description | Improved performance operational amplifier demand has continuously increased. IC designers use the charge pump technique as an advanced solution to implement the amplifier’s rail−to−rail input stage, but the need for a large load capacitor is a serious downside. To reduce this passive component value, high−frequency clock circuits with a 50% duty cycle should be implemented. This paper focuses on designing such a circuit that is further compensated with temperature and power supply, maintaining these performances even when process variations occur, starting from a ring oscillator as the architecture core. A pre−layout 50 MHz center frequency at 25 °C with a 1.6 temperature percentage error was achieved. Post−layout simulations to account for parasitic effects were also performed, with a 48.9 MHz center frequency reached. Distinct methods that control the frequency variation were discussed and established. Performance comparison of the designed PLL with previously reported clock circuits in the CMOS process was concluded, with superior results such as power consumption, die area, and temperature range accomplished. |
first_indexed | 2024-03-11T09:48:06Z |
format | Article |
id | doaj.art-652482c62fea4b88b3ada731201e8861 |
institution | Directory Open Access Journal |
issn | 2079-9292 |
language | English |
last_indexed | 2024-03-11T09:48:06Z |
publishDate | 2023-01-01 |
publisher | MDPI AG |
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series | Electronics |
spelling | doaj.art-652482c62fea4b88b3ada731201e88612023-11-16T16:27:27ZengMDPI AGElectronics2079-92922023-01-0112350710.3390/electronics12030507Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring OscillatorCristian Stancu0Andrei Neacsu1Ovidiu Profirescu2Dragos Dobrescu3Lidia Dobrescu4Department of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, 060042 Bucharest, RomaniaDepartment of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, 060042 Bucharest, RomaniaDepartment of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, 060042 Bucharest, RomaniaDepartment of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, 060042 Bucharest, RomaniaDepartment of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, 060042 Bucharest, RomaniaImproved performance operational amplifier demand has continuously increased. IC designers use the charge pump technique as an advanced solution to implement the amplifier’s rail−to−rail input stage, but the need for a large load capacitor is a serious downside. To reduce this passive component value, high−frequency clock circuits with a 50% duty cycle should be implemented. This paper focuses on designing such a circuit that is further compensated with temperature and power supply, maintaining these performances even when process variations occur, starting from a ring oscillator as the architecture core. A pre−layout 50 MHz center frequency at 25 °C with a 1.6 temperature percentage error was achieved. Post−layout simulations to account for parasitic effects were also performed, with a 48.9 MHz center frequency reached. Distinct methods that control the frequency variation were discussed and established. Performance comparison of the designed PLL with previously reported clock circuits in the CMOS process was concluded, with superior results such as power consumption, die area, and temperature range accomplished.https://www.mdpi.com/2079-9292/12/3/507ring oscillatorLDOfrequency oscillationCMOS technologylevel−shiftercharge−pump |
spellingShingle | Cristian Stancu Andrei Neacsu Ovidiu Profirescu Dragos Dobrescu Lidia Dobrescu Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator Electronics ring oscillator LDO frequency oscillation CMOS technology level−shifter charge−pump |
title | Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator |
title_full | Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator |
title_fullStr | Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator |
title_full_unstemmed | Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator |
title_short | Temperature and Power Supply Compensated CMOS Clock Circuit Based on Ring Oscillator |
title_sort | temperature and power supply compensated cmos clock circuit based on ring oscillator |
topic | ring oscillator LDO frequency oscillation CMOS technology level−shifter charge−pump |
url | https://www.mdpi.com/2079-9292/12/3/507 |
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