| Summary: | The recent developments in the replacement of bulk MOSFETs with high-performance semiconductor devices create new opportunities in attaining the best device configuration with drive current, leakage current, subthreshold swing, Drain-Induced Barrier Lowering (DIBL), and other short-channel effect (SCE) parameters. Now, multigate FETs (FinFET and tri-gate (TG)) are advanced methodologies to continue the scaling of devices. Also, strain technology is used to gain a higher current drive, which raises the device performance, and high-k dielectric material is used to minimize the subthreshold current. In this work, we used stacked high-k dielectric materials in a TG n-FinFET with three fins and a 10 nm channel length, incorporating a three-layered strained silicon channel to determine the short-channel effects. Here, we replaced the gate oxide (SiO<sub>2</sub>) with a stacked gate oxide of 0.5 nm of SiO<sub>2</sub> with a 0.5 nm effective oxide thickness of different high-k dielectric materials like Si<sub>3</sub>N<sub>4</sub>, Al<sub>2</sub>O<sub>3</sub>, ZrO<sub>2,</sub> and HfO<sub>2</sub>. It was found that the use of strained silicon and replacing only the SiO<sub>2</sub> device with the stacked SiO<sub>2</sub> and HfO<sub>2</sub> device was more beneficial to obtain an optimized device with the least leakage and improved drive currents.
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