The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length

The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length

The recent developments in the replacement of bulk MOSFETs with high-performance semiconductor devices create new opportunities in attaining the best device configuration with drive current, leakage current, subthreshold swing, Drain-Induced Barrier Lowering (DIBL), and other short-channel effect (S...

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Bibliographic Details
Main Authors:	Priyanka Saha, Rudra Sankar Dhar, Swagat Nanda, Kuleen Kumar, Moath Alathbah
Format:	Article
Language:	English
Published:	MDPI AG 2023-11-01
Series:	Nanomaterials
Subjects:	TG FinFET physical oxide thickness HOI device stacked high-k Silvaco TCAD V<sub>TH</sub> DIBL
Online Access:	https://www.mdpi.com/2079-4991/13/23/3008

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