A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots

With the wide application of autonomous mobile robots (AMRs), the visual inertial odometer (VIO) system that realizes the positioning function through the integration of a camera and inertial measurement unit (IMU) has developed rapidly, but it is still limited by the high complexity of the algorith...

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Main Authors: Yonghao Tan, Mengying Sun, Huanshihong Deng, Haihan Wu, Minghao Zhou, Yifei Chen, Zhuo Yu, Qinghan Zeng, Ping Li, Lei Chen, Fengwei An
Format: Article
Language:English
Published: MDPI AG 2022-10-01
Series:Sensors
Subjects:
Online Access:https://www.mdpi.com/1424-8220/22/19/7669
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author Yonghao Tan
Mengying Sun
Huanshihong Deng
Haihan Wu
Minghao Zhou
Yifei Chen
Zhuo Yu
Qinghan Zeng
Ping Li
Lei Chen
Fengwei An
author_facet Yonghao Tan
Mengying Sun
Huanshihong Deng
Haihan Wu
Minghao Zhou
Yifei Chen
Zhuo Yu
Qinghan Zeng
Ping Li
Lei Chen
Fengwei An
author_sort Yonghao Tan
collection DOAJ
description With the wide application of autonomous mobile robots (AMRs), the visual inertial odometer (VIO) system that realizes the positioning function through the integration of a camera and inertial measurement unit (IMU) has developed rapidly, but it is still limited by the high complexity of the algorithm, the long development cycle of the dedicated accelerator, and the low power supply capacity of AMRs. This work designs a reconfigurable accelerated core that supports different VIO algorithms and has high area and energy efficiency, precision, and speed processing characteristics. Experimental results show that the loss of accuracy of the proposed accelerator is negligible on the most authoritative dataset. The on-chip memory usage of 70 KB is at least 10× smaller than the state-of-the-art works. Thus, the FPGA implementation’s hardware-resource consumption, power dissipation, and synthesis in the 28 nm CMOS outperform the previous works with the same platform.
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spelling doaj.art-66996df465644fa988a250b981d8c6d02023-11-23T21:52:54ZengMDPI AGSensors1424-82202022-10-012219766910.3390/s22197669A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile RobotsYonghao Tan0Mengying Sun1Huanshihong Deng2Haihan Wu3Minghao Zhou4Yifei Chen5Zhuo Yu6Qinghan Zeng7Ping Li8Lei Chen9Fengwei An10School of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaScientific and Technical Center for Innovation, Beijing 100080, ChinaDepartment of Computing and School of Design, The Hong Kong Polytechnic University, Hong Kong, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaWith the wide application of autonomous mobile robots (AMRs), the visual inertial odometer (VIO) system that realizes the positioning function through the integration of a camera and inertial measurement unit (IMU) has developed rapidly, but it is still limited by the high complexity of the algorithm, the long development cycle of the dedicated accelerator, and the low power supply capacity of AMRs. This work designs a reconfigurable accelerated core that supports different VIO algorithms and has high area and energy efficiency, precision, and speed processing characteristics. Experimental results show that the loss of accuracy of the proposed accelerator is negligible on the most authoritative dataset. The on-chip memory usage of 70 KB is at least 10× smaller than the state-of-the-art works. Thus, the FPGA implementation’s hardware-resource consumption, power dissipation, and synthesis in the 28 nm CMOS outperform the previous works with the same platform.https://www.mdpi.com/1424-8220/22/19/7669SLAMVIOacceleratorreconfigurableAMRs
spellingShingle Yonghao Tan
Mengying Sun
Huanshihong Deng
Haihan Wu
Minghao Zhou
Yifei Chen
Zhuo Yu
Qinghan Zeng
Ping Li
Lei Chen
Fengwei An
A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
Sensors
SLAM
VIO
accelerator
reconfigurable
AMRs
title A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
title_full A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
title_fullStr A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
title_full_unstemmed A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
title_short A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots
title_sort reconfigurable visual inertial odometry accelerated core with high area and energy efficiency for autonomous mobile robots
topic SLAM
VIO
accelerator
reconfigurable
AMRs
url https://www.mdpi.com/1424-8220/22/19/7669
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