Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers
Bus admittance matrix is widely used in power engineering for network modeling. Being highly sparse, it requires fewer CPU operations when used for calculations. Meanwhile, sparse matrix calculations involve numerous indexing and scalar operations, which are unfavorable to modern processors. Without...
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Open Access Journal of Power and Energy |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10436083/ |
| _version_ | 1797296340420526080 |
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| author | Hantao Cui |
| author_facet | Hantao Cui |
| author_sort | Hantao Cui |
| collection | DOAJ |
| description | Bus admittance matrix is widely used in power engineering for network modeling. Being highly sparse, it requires fewer CPU operations when used for calculations. Meanwhile, sparse matrix calculations involve numerous indexing and scalar operations, which are unfavorable to modern processors. Without using the admittance matrix, nodal power injections and the corresponding sparse Jacobian can be computed by an element-wise method, which consists of a highly regular, vectorized evaluation step and a reduction step. This paper revisits the computational performance of the admittance matrix-based method, in terms of power injection and Jacobian matrix calculation, by comparing it with the element-wise method. Case studies show that the admittance matrix method is generally slower than the element-wise method for grid test cases with thousands to hundreds of thousands of buses, especially on CPUs with support for wide vector instructions. This paper also analyzes the impact of the width of vector instructions and memory speed to predict the trend for future computers. |
| first_indexed | 2024-03-07T22:03:13Z |
| format | Article |
| id | doaj.art-66b6ab90275b4b24b039e1db166e8367 |
| institution | Directory Open Access Journal |
| issn | 2687-7910 |
| language | English |
| last_indexed | 2024-03-07T22:03:13Z |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Open Access Journal of Power and Energy |
| spelling | doaj.art-66b6ab90275b4b24b039e1db166e83672024-02-24T00:01:34ZengIEEEIEEE Open Access Journal of Power and Energy2687-79102024-01-0111839310.1109/OAJPE.2024.336611710436083Bus Admittance Matrix Revisited: Performance Challenges on Modern ComputersHantao Cui0https://orcid.org/0000-0002-4259-5925School of Electrical and Computer Engineering, Oklahoma State University, Stillwater, OK, USABus admittance matrix is widely used in power engineering for network modeling. Being highly sparse, it requires fewer CPU operations when used for calculations. Meanwhile, sparse matrix calculations involve numerous indexing and scalar operations, which are unfavorable to modern processors. Without using the admittance matrix, nodal power injections and the corresponding sparse Jacobian can be computed by an element-wise method, which consists of a highly regular, vectorized evaluation step and a reduction step. This paper revisits the computational performance of the admittance matrix-based method, in terms of power injection and Jacobian matrix calculation, by comparing it with the element-wise method. Case studies show that the admittance matrix method is generally slower than the element-wise method for grid test cases with thousands to hundreds of thousands of buses, especially on CPUs with support for wide vector instructions. This paper also analyzes the impact of the width of vector instructions and memory speed to predict the trend for future computers.https://ieeexplore.ieee.org/document/10436083/Bus admittance matrixsparse matrixhigh-performance computingvectorizationsingle-instruction multiple data (SIMD) |
| spellingShingle | Hantao Cui Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers IEEE Open Access Journal of Power and Energy Bus admittance matrix sparse matrix high-performance computing vectorization single-instruction multiple data (SIMD) |
| title | Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers |
| title_full | Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers |
| title_fullStr | Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers |
| title_full_unstemmed | Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers |
| title_short | Bus Admittance Matrix Revisited: Performance Challenges on Modern Computers |
| title_sort | bus admittance matrix revisited performance challenges on modern computers |
| topic | Bus admittance matrix sparse matrix high-performance computing vectorization single-instruction multiple data (SIMD) |
| url | https://ieeexplore.ieee.org/document/10436083/ |
| work_keys_str_mv | AT hantaocui busadmittancematrixrevisitedperformancechallengesonmoderncomputers |