A modular technique of Booth encoding and Vedic multiplier for low-area and high-speed applications
Abstract A technique for efficiently multiplying two signed numbers using limited area and high speed is presented in this paper. This work uses both the Booth and Vedic multiplication sutra methodologies to enhance the speed and reduction in the area by using two VLSI architectures of radix encodin...
Main Authors: | C. M. Kalaiselvi, R. S. Sabeenian |
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Format: | Article |
Language: | English |
Published: |
Nature Portfolio
2023-12-01
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Series: | Scientific Reports |
Online Access: | https://doi.org/10.1038/s41598-023-49913-5 |
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