Biometric key generation and multi round AES crypto system for improved security
To improve the reliability and system performance many transformation works have been investigated using various contexts. In general, numerical global key models and pseudo-random numbers for public block cipher algorithms suffers from key leakages and insufficient key strength. To overcome all the...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2023-12-01
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| Series: | Measurement: Sensors |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2665917423002672 |
| _version_ | 1797454282315792384 |
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| author | S. Nagaraju R. Nagendra Shanmugham Balasundaram R. Kiran Kumar |
| author_facet | S. Nagaraju R. Nagendra Shanmugham Balasundaram R. Kiran Kumar |
| author_sort | S. Nagaraju |
| collection | DOAJ |
| description | To improve the reliability and system performance many transformation works have been investigated using various contexts. In general, numerical global key models and pseudo-random numbers for public block cipher algorithms suffers from key leakages and insufficient key strength. To overcome all these challenges, an intellectual cryptosystem is proposed with hierarchical hardware pipelined structures. An additional goal of the proposed framework is to enhance the area efficiency, throughput and optimize the hardware structures. In this paper 256-bit AES algorithm proposed with highly optimized hardware units using hybrid resource sharing and modified Key schedule along with optimized Sub bytes blocks, for reduced complexity overhead. The path delay optimization is achieved by decomposing the internal operations into bytes and applied stage wise pipelining and compared with direct 128-bit AES operations without pipeline. The proposed implementation helps in re-using the same hardware in a pipelined fashion which results in improved area efficiency up to 2.8 times and energy efficiency of 22 % over conventional AES crypto system. |
| first_indexed | 2024-03-09T15:36:00Z |
| format | Article |
| id | doaj.art-68c47f3c2f6f4613b03ab3a422e018fc |
| institution | Directory Open Access Journal |
| issn | 2665-9174 |
| language | English |
| last_indexed | 2024-03-09T15:36:00Z |
| publishDate | 2023-12-01 |
| publisher | Elsevier |
| record_format | Article |
| series | Measurement: Sensors |
| spelling | doaj.art-68c47f3c2f6f4613b03ab3a422e018fc2023-11-26T05:13:53ZengElsevierMeasurement: Sensors2665-91742023-12-0130100931Biometric key generation and multi round AES crypto system for improved securityS. Nagaraju0R. Nagendra1Shanmugham Balasundaram2R. Kiran Kumar3Department of Electronics and Communication Engineering, Srinivasa Ramanujan Institute of Technology, Ananthapuramu, Andhra Pradesh, India; Corresponding author.ECE Department, Sree Vidyanikethan Engineering College, Mohan Babu University, Tirupati, Andhra Pradesh, IndiaSchool of Engineering and Technology, Dhanalakshmi Srinivasan University, Tiruchirappalli, Tamil Nadu, IndiaDepartment of Electronics and Communication Engineering, Madanapalle Institute of Technology and Science, Madanapalle, Andhra Pradesh, IndiaTo improve the reliability and system performance many transformation works have been investigated using various contexts. In general, numerical global key models and pseudo-random numbers for public block cipher algorithms suffers from key leakages and insufficient key strength. To overcome all these challenges, an intellectual cryptosystem is proposed with hierarchical hardware pipelined structures. An additional goal of the proposed framework is to enhance the area efficiency, throughput and optimize the hardware structures. In this paper 256-bit AES algorithm proposed with highly optimized hardware units using hybrid resource sharing and modified Key schedule along with optimized Sub bytes blocks, for reduced complexity overhead. The path delay optimization is achieved by decomposing the internal operations into bytes and applied stage wise pipelining and compared with direct 128-bit AES operations without pipeline. The proposed implementation helps in re-using the same hardware in a pipelined fashion which results in improved area efficiency up to 2.8 times and energy efficiency of 22 % over conventional AES crypto system.http://www.sciencedirect.com/science/article/pii/S2665917423002672Advanced encryption standard (AES)Key generation phaseSecurityCipher attackSensitivity level etc |
| spellingShingle | S. Nagaraju R. Nagendra Shanmugham Balasundaram R. Kiran Kumar Biometric key generation and multi round AES crypto system for improved security Measurement: Sensors Advanced encryption standard (AES) Key generation phase Security Cipher attack Sensitivity level etc |
| title | Biometric key generation and multi round AES crypto system for improved security |
| title_full | Biometric key generation and multi round AES crypto system for improved security |
| title_fullStr | Biometric key generation and multi round AES crypto system for improved security |
| title_full_unstemmed | Biometric key generation and multi round AES crypto system for improved security |
| title_short | Biometric key generation and multi round AES crypto system for improved security |
| title_sort | biometric key generation and multi round aes crypto system for improved security |
| topic | Advanced encryption standard (AES) Key generation phase Security Cipher attack Sensitivity level etc |
| url | http://www.sciencedirect.com/science/article/pii/S2665917423002672 |
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