An Analysis on the Architecture and the Size of Quantized Hardware Neural Networks Based on Memristors
We have performed different simulation experiments in relation to hardware neural networks (NN) to analyze the role of the number of synapses for different NN architectures in the network accuracy, considering different datasets. A technology that stands upon 4-kbit 1T1R ReRAM arrays, where resistiv...
Main Authors: | Rocio Romero-Zaliz, Antonio Cantudo, Eduardo Perez, Francisco Jimenez-Molinos, Christian Wenger, Juan Bautista Roldan |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2021-12-01
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Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/10/24/3141 |
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