Congestion Prediction in FPGA Using Regression Based Learning Methods
Design closure in general VLSI physical design flows and FPGA physical design flows is an important and time-consuming problem. Routing itself can consume as much as 70% of the total design time. Accurate congestion estimation during the early stages of the design flow can help alleviate last-minute...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2021-08-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/10/16/1995 |