A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars

In the traditional SJ MOSFET structure, n/p pillars with the same doping concentrations in the drift region are introduced to decrease the on-resistance. However, SJ MOSFET will turn on the parasitic diodes due to fast reverse recovery, further inducing severe oscillation in the reverse recovery of...

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Main Authors: Rongyu Gao, Hongyu Cheng, Wenmao Li, Chenkai Deng, Jianguo Chen, Qing Wang, Hongyu Yu
Format: Article
Language:English
Published: MDPI AG 2022-06-01
Series:Crystals
Subjects:
Online Access:https://www.mdpi.com/2073-4352/12/7/916
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author Rongyu Gao
Hongyu Cheng
Wenmao Li
Chenkai Deng
Jianguo Chen
Qing Wang
Hongyu Yu
author_facet Rongyu Gao
Hongyu Cheng
Wenmao Li
Chenkai Deng
Jianguo Chen
Qing Wang
Hongyu Yu
author_sort Rongyu Gao
collection DOAJ
description In the traditional SJ MOSFET structure, n/p pillars with the same doping concentrations in the drift region are introduced to decrease the on-resistance. However, SJ MOSFET will turn on the parasitic diodes due to fast reverse recovery, further inducing severe oscillation in the reverse recovery of the device and the corresponding adverse effect on the circuit. In this study, a fast recovery vertical superjunction (SJ) MOSFET with n-Si and p-3C-SiC pillars was studied. Unlike other structures, such as the 4H-SiC superjunction UMOSFET with a heterojunction diode or the ultra-low recovery charge cell-distributed Schottky contacts SJ-MOSFET with integrated isolated NMOS, we introduce a Schottky barrier diode (SBD) on the source contact at the top of the n-Si pillar in the SJ-MOSFET to improve the device reverse recovery. The simulation software TCAD Silvaco was utilized to simulate the device properties. Compared with the conventional Si SJ, the proposed Si/SiC SJ with the Schottky barrier diode (SBD) connected demonstrated a lower reverse recovery charge, which was reduced by 90.5%, respectively. The waveform of the reverse recovery current demonstrates that the electrons in the device are withdrawn from SBD during reverse recovery, preventing the opening of the parasitic diode in the SJ MOSFET. Finally, another structure is illustrated to decrease the gate capacitance by introducing a thin p-base layer between the gate metal and N-Si pillar so that it can improve the switching characteristics of devices. The open-loss and off-loss of the improved device were reduced by 33% and 42.3%, respectively.
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spelling doaj.art-6a3c8d5e7b0e4113929d2ccda255f0792023-12-03T14:52:14ZengMDPI AGCrystals2073-43522022-06-0112791610.3390/cryst12070916A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC PillarsRongyu Gao0Hongyu Cheng1Wenmao Li2Chenkai Deng3Jianguo Chen4Qing Wang5Hongyu Yu6School of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaFounder Microelectronics International Co., Ltd., Shenzhen 518116, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaSchool of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, ChinaIn the traditional SJ MOSFET structure, n/p pillars with the same doping concentrations in the drift region are introduced to decrease the on-resistance. However, SJ MOSFET will turn on the parasitic diodes due to fast reverse recovery, further inducing severe oscillation in the reverse recovery of the device and the corresponding adverse effect on the circuit. In this study, a fast recovery vertical superjunction (SJ) MOSFET with n-Si and p-3C-SiC pillars was studied. Unlike other structures, such as the 4H-SiC superjunction UMOSFET with a heterojunction diode or the ultra-low recovery charge cell-distributed Schottky contacts SJ-MOSFET with integrated isolated NMOS, we introduce a Schottky barrier diode (SBD) on the source contact at the top of the n-Si pillar in the SJ-MOSFET to improve the device reverse recovery. The simulation software TCAD Silvaco was utilized to simulate the device properties. Compared with the conventional Si SJ, the proposed Si/SiC SJ with the Schottky barrier diode (SBD) connected demonstrated a lower reverse recovery charge, which was reduced by 90.5%, respectively. The waveform of the reverse recovery current demonstrates that the electrons in the device are withdrawn from SBD during reverse recovery, preventing the opening of the parasitic diode in the SJ MOSFET. Finally, another structure is illustrated to decrease the gate capacitance by introducing a thin p-base layer between the gate metal and N-Si pillar so that it can improve the switching characteristics of devices. The open-loss and off-loss of the improved device were reduced by 33% and 42.3%, respectively.https://www.mdpi.com/2073-4352/12/7/916superjunctionpower MOSFETreverse recoverySchottky contact3C-SiC pillar
spellingShingle Rongyu Gao
Hongyu Cheng
Wenmao Li
Chenkai Deng
Jianguo Chen
Qing Wang
Hongyu Yu
A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
Crystals
superjunction
power MOSFET
reverse recovery
Schottky contact
3C-SiC pillar
title A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
title_full A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
title_fullStr A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
title_full_unstemmed A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
title_short A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars
title_sort fast recovery vertical superjunction mosfet with n si and p 3c sic pillars
topic superjunction
power MOSFET
reverse recovery
Schottky contact
3C-SiC pillar
url https://www.mdpi.com/2073-4352/12/7/916
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