QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER

Quantum Cellular Automata (QCA) is a transistor-less computation model that addresses the problem of device interconnection and density which holds the promise of high speed and fewer sizes compare to the Complementary Metal Oxide Semiconductor (CMOS) design. In this study, the design of 4-bit down...

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Main Authors: Thivya K.S, Anandhi S, Sudhaman K
Format: Article
Language:English
Published: XLESCIENCE 2017-12-01
Series:International Journal of Advances in Signal and Image Sciences
Subjects:
Online Access:https://xlescience.org/index.php/IJASIS/article/view/24
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author Thivya K.S
Anandhi S
Sudhaman K
author_facet Thivya K.S
Anandhi S
Sudhaman K
author_sort Thivya K.S
collection DOAJ
description Quantum Cellular Automata (QCA) is a transistor-less computation model that addresses the problem of device interconnection and density which holds the promise of high speed and fewer sizes compare to the Complementary Metal Oxide Semiconductor (CMOS) design. In this study, the design of 4-bit down asynchronous counter which is the fundamental block of the digital technology using new D-Flip Flops (D-FF) layouts is discussed. This D-FF is designed using majority gates. The FF clock inputs are not driven by the same clock and each FF output depends on the previous output. This design finds its application in nanotechnology fields including medical field to monitor the patient’s activity by utilizing timer based tools. The design of 4-bit down asynchronous counter is simulated in the QCA design tool.
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spelling doaj.art-6a7469e1bcaf48e39fb4f3f2a67ccc8d2022-12-21T19:13:39ZengXLESCIENCEInternational Journal of Advances in Signal and Image Sciences2457-03702017-12-013281310.29284/ijasis.3.2.2017.8-1324QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTERThivya K.SAnandhi SSudhaman KQuantum Cellular Automata (QCA) is a transistor-less computation model that addresses the problem of device interconnection and density which holds the promise of high speed and fewer sizes compare to the Complementary Metal Oxide Semiconductor (CMOS) design. In this study, the design of 4-bit down asynchronous counter which is the fundamental block of the digital technology using new D-Flip Flops (D-FF) layouts is discussed. This D-FF is designed using majority gates. The FF clock inputs are not driven by the same clock and each FF output depends on the previous output. This design finds its application in nanotechnology fields including medical field to monitor the patient’s activity by utilizing timer based tools. The design of 4-bit down asynchronous counter is simulated in the QCA design tool.https://xlescience.org/index.php/IJASIS/article/view/24qca, asynchronous counter, d flip-flop, majority gate
spellingShingle Thivya K.S
Anandhi S
Sudhaman K
QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
International Journal of Advances in Signal and Image Sciences
qca, asynchronous counter, d flip-flop, majority gate
title QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
title_full QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
title_fullStr QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
title_full_unstemmed QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
title_short QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
title_sort qca design for 4 bit asynchronous down counter
topic qca, asynchronous counter, d flip-flop, majority gate
url https://xlescience.org/index.php/IJASIS/article/view/24
work_keys_str_mv AT thivyaks qcadesignfor4bitasynchronousdowncounter
AT anandhis qcadesignfor4bitasynchronousdowncounter
AT sudhamank qcadesignfor4bitasynchronousdowncounter