Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables
Sizing analog circuits using precomputed look-up tables (LUTs) has recently gained traction for fast and systematic design-space exploration without a simulator in the loop. In its current form, the underlying <inline-formula> <tex-math notation="LaTeX">$g_{m}/I_{D}$ </tex-m...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10107639/ |
| _version_ | 1797835818961731584 |
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| author | Karimeldeen Mohamed Khaled Y. Yasseen Boris Murmann Hesham Omran |
| author_facet | Karimeldeen Mohamed Khaled Y. Yasseen Boris Murmann Hesham Omran |
| author_sort | Karimeldeen Mohamed |
| collection | DOAJ |
| description | Sizing analog circuits using precomputed look-up tables (LUTs) has recently gained traction for fast and systematic design-space exploration without a simulator in the loop. In its current form, the underlying <inline-formula> <tex-math notation="LaTeX">$g_{m}/I_{D}$ </tex-math></inline-formula>-based design methodology assumes that the MOSFET figures of merit are independent of absolute channel width. However, this assumption can introduce significant errors when the layout-dependent effects (LDEs) of modern CMOS technologies are considered. In this paper, an accurate and efficient procedure is developed that incorporates the dependence on the MOSFET width per finger and number of fingers in the precomputed LUTs. The proposed approach uses a set of normalized auxiliary LUTs to correct the device behavior with a subtle impact on the LUT size and the computational effort. Moreover, the nonlinear variation of the drain-to-bulk (<inline-formula> <tex-math notation="LaTeX">$c_{db}$ </tex-math></inline-formula>) and source-to-bulk (<inline-formula> <tex-math notation="LaTeX">$c_{sb}$ </tex-math></inline-formula>) capacitances with the device number of fingers is taken into account. The correction is based on precomputed simulation data and is thus independent of the model parameters and implementation. We present a track-and-hold circuit example that is sensitive to the width independence assumption, and show that the proposed fix prevents overdesign, resulting in a 44% reduction in switch area. |
| first_indexed | 2024-04-09T14:58:36Z |
| format | Article |
| id | doaj.art-6af37012559f41ca86cdfc86707a981e |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-04-09T14:58:36Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-6af37012559f41ca86cdfc86707a981e2023-05-01T23:00:33ZengIEEEIEEE Access2169-35362023-01-0111412054121710.1109/ACCESS.2023.327010610107639Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup TablesKarimeldeen Mohamed0https://orcid.org/0000-0003-2512-3042Khaled Y. Yasseen1Boris Murmann2https://orcid.org/0000-0003-3417-8782Hesham Omran3https://orcid.org/0000-0002-0117-7364Department of Electrical Engineering, Suez Canal University, Ismailia, EgyptIntegrated Circuits Laboratory (ICL), Faculty of Engineering, Ain Shams University, Cairo, EgyptDepartment of Electrical Engineering, Stanford University, Stanford, CA, USAIntegrated Circuits Laboratory (ICL), Faculty of Engineering, Ain Shams University, Cairo, EgyptSizing analog circuits using precomputed look-up tables (LUTs) has recently gained traction for fast and systematic design-space exploration without a simulator in the loop. In its current form, the underlying <inline-formula> <tex-math notation="LaTeX">$g_{m}/I_{D}$ </tex-math></inline-formula>-based design methodology assumes that the MOSFET figures of merit are independent of absolute channel width. However, this assumption can introduce significant errors when the layout-dependent effects (LDEs) of modern CMOS technologies are considered. In this paper, an accurate and efficient procedure is developed that incorporates the dependence on the MOSFET width per finger and number of fingers in the precomputed LUTs. The proposed approach uses a set of normalized auxiliary LUTs to correct the device behavior with a subtle impact on the LUT size and the computational effort. Moreover, the nonlinear variation of the drain-to-bulk (<inline-formula> <tex-math notation="LaTeX">$c_{db}$ </tex-math></inline-formula>) and source-to-bulk (<inline-formula> <tex-math notation="LaTeX">$c_{sb}$ </tex-math></inline-formula>) capacitances with the device number of fingers is taken into account. The correction is based on precomputed simulation data and is thus independent of the model parameters and implementation. We present a track-and-hold circuit example that is sensitive to the width independence assumption, and show that the proposed fix prevents overdesign, resulting in a 44% reduction in switch area.https://ieeexplore.ieee.org/document/10107639/gm/ID methodologyprecomputed lookup tablesanalog design automationlayout dependent effects (LDEs) |
| spellingShingle | Karimeldeen Mohamed Khaled Y. Yasseen Boris Murmann Hesham Omran Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables IEEE Access gm/ID methodology precomputed lookup tables analog design automation layout dependent effects (LDEs) |
| title | Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables |
| title_full | Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables |
| title_fullStr | Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables |
| title_full_unstemmed | Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables |
| title_short | Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables |
| title_sort | capturing layout dependent effects in mosfet circuit sizing using precomputed lookup tables |
| topic | gm/ID methodology precomputed lookup tables analog design automation layout dependent effects (LDEs) |
| url | https://ieeexplore.ieee.org/document/10107639/ |
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