Differential Power Analysis: A Serious Threat to FPGA Security
Differential Power Analysis (DPA) implies measuring the supply current of a cipher-circuit in an attempt to uncover part of a cipher key. Cryptographic security gets compromised if the current waveforms obtained correlate with those from a hypothetical power model of the circuit. As FPGAs are becomi...
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| Format: | Article |
| Language: | English |
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Iran University of Science and Technology
2012-03-01
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| Series: | Iranian Journal of Electrical and Electronic Engineering |
| Subjects: | |
| Online Access: | http://ijeee.iust.ac.ir/browse.php?a_code=A-10-499-1&slc_lang=en&sid=1 |
| _version_ | 1818419915325964288 |
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| author | M. Masoumi |
| author_facet | M. Masoumi |
| author_sort | M. Masoumi |
| collection | DOAJ |
| description | Differential Power Analysis (DPA) implies measuring the supply current of a cipher-circuit in an attempt to uncover part of a cipher key. Cryptographic security gets compromised if the current waveforms obtained correlate with those from a hypothetical power model of the circuit. As FPGAs are becoming integral parts of embedded systems and increasingly popular for cryptographic applications and rapid prototyping, it is imperative to consider security on FPGAs as a whole. During last years, there has been a large amount of work done dealing with the algorithmic and architectural aspects of cryptographic schemes implemented on FPGAs, however, there are only a few articles that assess their vulnerability to such attacks which, in practice, pose far a greater danger than algorithmic attacks. This paper first demonstrates the vulnerability of the Advanced Encryption Standard Algorithm (AES) implemented on a FPGA and then presents a novel approach for implementation of the AES algorithm which provides a significantly improved strength against differential power analysis with a minimal additional hardware overhead. The efficiency of the proposed technique was verified by practical results obtained from real implementation on a Xilinx Spartan-II FPGA. |
| first_indexed | 2024-12-14T12:46:09Z |
| format | Article |
| id | doaj.art-6b2da85a1a8d4599b69840f400e799ab |
| institution | Directory Open Access Journal |
| issn | 1735-2827 2383-3890 |
| language | English |
| last_indexed | 2024-12-14T12:46:09Z |
| publishDate | 2012-03-01 |
| publisher | Iran University of Science and Technology |
| record_format | Article |
| series | Iranian Journal of Electrical and Electronic Engineering |
| spelling | doaj.art-6b2da85a1a8d4599b69840f400e799ab2022-12-21T23:00:47ZengIran University of Science and TechnologyIranian Journal of Electrical and Electronic Engineering1735-28272383-38902012-03-01811627Differential Power Analysis: A Serious Threat to FPGA SecurityM. Masoumi0 K. N. toosi University of Tech. Differential Power Analysis (DPA) implies measuring the supply current of a cipher-circuit in an attempt to uncover part of a cipher key. Cryptographic security gets compromised if the current waveforms obtained correlate with those from a hypothetical power model of the circuit. As FPGAs are becoming integral parts of embedded systems and increasingly popular for cryptographic applications and rapid prototyping, it is imperative to consider security on FPGAs as a whole. During last years, there has been a large amount of work done dealing with the algorithmic and architectural aspects of cryptographic schemes implemented on FPGAs, however, there are only a few articles that assess their vulnerability to such attacks which, in practice, pose far a greater danger than algorithmic attacks. This paper first demonstrates the vulnerability of the Advanced Encryption Standard Algorithm (AES) implemented on a FPGA and then presents a novel approach for implementation of the AES algorithm which provides a significantly improved strength against differential power analysis with a minimal additional hardware overhead. The efficiency of the proposed technique was verified by practical results obtained from real implementation on a Xilinx Spartan-II FPGA.http://ijeee.iust.ac.ir/browse.php?a_code=A-10-499-1&slc_lang=en&sid=1Cryptography Security Advanced Encryption Standard Algorithm Differential Power Analysis FPGA |
| spellingShingle | M. Masoumi Differential Power Analysis: A Serious Threat to FPGA Security Iranian Journal of Electrical and Electronic Engineering Cryptography Security Advanced Encryption Standard Algorithm Differential Power Analysis FPGA |
| title | Differential Power Analysis: A Serious Threat to FPGA Security |
| title_full | Differential Power Analysis: A Serious Threat to FPGA Security |
| title_fullStr | Differential Power Analysis: A Serious Threat to FPGA Security |
| title_full_unstemmed | Differential Power Analysis: A Serious Threat to FPGA Security |
| title_short | Differential Power Analysis: A Serious Threat to FPGA Security |
| title_sort | differential power analysis a serious threat to fpga security |
| topic | Cryptography Security Advanced Encryption Standard Algorithm Differential Power Analysis FPGA |
| url | http://ijeee.iust.ac.ir/browse.php?a_code=A-10-499-1&slc_lang=en&sid=1 |
| work_keys_str_mv | AT mmasoumi differentialpoweranalysisaseriousthreattofpgasecurity |