| Summary: | Silicon semiconductor-insulator-semiconductor (SIS) structures with high-k dielectrics are a promising new material for photonic and CMOS integrations. The “diode-like” currents through the symmetric atomic layer deposited (ALD) HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>… nanolayers with a highest rectification coefficient 10<sup>3</sup> are observed and explained by the asymmetry of the upper and lower heterointerfaces formed by bonding and ALD processes. As a result, different spatial charge regions (SCRs) are formed on both insulator sides. The lowest leakages are observed through the stacks, with total Al<sub>2</sub>O<sub>3</sub> thickness values of 8–10 nm, which also provide a diffusive barrier for hydrogen. The dominant mechanism of electron transport through the built-in insulator at the weak field E < 1 MV/cm is thermionic emission. The Poole-Frenkel (PF) mechanism of emission from traps dominates at larger E values. The charge carriers mobility 100–120 cm<sup>2</sup>/(V s) and interface states (IFS) density 1.2 × 10<sup>11</sup> cm<sup>−2</sup> are obtained for the n-p SIS structures with insulator HfO<sub>2</sub>:Al<sub>2</sub>O<sub>3</sub> (10:1) after rapid thermal annealing (RTA) at 800 °C. The drain current hysteresis of pseudo-metal-oxide-semiconductor field effect transistor (MOSFET) with the memory window 1.2–1.3 V at the gate voltage |V<sub>g</sub>| < ±2.5 V is maintained in the RTA treatment at T = 800–900 °C for these transistors.
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