Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives
Because of the need for processing and managing the massive amounts of big data in smart/wearable devices and driverless vehicles, semiconductor companies are focusing on developing byte-addressable non-volatile memory (NVM)-based storage systems. The byte-addressable NVMs, such as phase-change memo...
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| Format: | Article |
| Language: | English |
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IEEE
2019-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/8727528/ |
| _version_ | 1819276278844358656 |
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| author | Se Jin Kwon |
| author_facet | Se Jin Kwon |
| author_sort | Se Jin Kwon |
| collection | DOAJ |
| description | Because of the need for processing and managing the massive amounts of big data in smart/wearable devices and driverless vehicles, semiconductor companies are focusing on developing byte-addressable non-volatile memory (NVM)-based storage systems. The byte-addressable NVMs, such as phase-change memory, resistive memory, and magnetoresistive memory, are regarded as an alternative to NAND flash memories. There have been many proposals and studies on the use of NVM as main memory in the memory hierarchy. However, there has not been much academic research on using NVM as a substitute for NAND flash memories. This paper provides a system architecture for an NVM-based solid state drive based on some speculations/assumptions on the hardware characteristics of NVMs. It applies the previously proposed address-mapping algorithms of conventional solid state drives to the NVM-based solid state drives and examines their suitability. The optimization of I/O parallelism of static and dynamic address mapping algorithms is compared and analyzed. This paper also observes the effect of log block policies on the hardware characteristics of the NVMs. |
| first_indexed | 2024-12-23T23:37:41Z |
| format | Article |
| id | doaj.art-6d35e4f8f41f401f8f7fa002979ce284 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-12-23T23:37:41Z |
| publishDate | 2019-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-6d35e4f8f41f401f8f7fa002979ce2842022-12-21T17:25:49ZengIEEEIEEE Access2169-35362019-01-017732077321410.1109/ACCESS.2019.29202498727528Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State DrivesSe Jin Kwon0https://orcid.org/0000-0002-6295-7014Department of Computer Engineering, Kangwon National University, Samcheok, South KoreaBecause of the need for processing and managing the massive amounts of big data in smart/wearable devices and driverless vehicles, semiconductor companies are focusing on developing byte-addressable non-volatile memory (NVM)-based storage systems. The byte-addressable NVMs, such as phase-change memory, resistive memory, and magnetoresistive memory, are regarded as an alternative to NAND flash memories. There have been many proposals and studies on the use of NVM as main memory in the memory hierarchy. However, there has not been much academic research on using NVM as a substitute for NAND flash memories. This paper provides a system architecture for an NVM-based solid state drive based on some speculations/assumptions on the hardware characteristics of NVMs. It applies the previously proposed address-mapping algorithms of conventional solid state drives to the NVM-based solid state drives and examines their suitability. The optimization of I/O parallelism of static and dynamic address mapping algorithms is compared and analyzed. This paper also observes the effect of log block policies on the hardware characteristics of the NVMs.https://ieeexplore.ieee.org/document/8727528/Cache storageflash memorynonvolatile memorysoftware systemswearable computers |
| spellingShingle | Se Jin Kwon Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives IEEE Access Cache storage flash memory nonvolatile memory software systems wearable computers |
| title | Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives |
| title_full | Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives |
| title_fullStr | Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives |
| title_full_unstemmed | Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives |
| title_short | Address Translation Layer for Byte-Addressable Non-Volatile Memory-Based Solid State Drives |
| title_sort | address translation layer for byte addressable non volatile memory based solid state drives |
| topic | Cache storage flash memory nonvolatile memory software systems wearable computers |
| url | https://ieeexplore.ieee.org/document/8727528/ |
| work_keys_str_mv | AT sejinkwon addresstranslationlayerforbyteaddressablenonvolatilememorybasedsolidstatedrives |