Implementation of three stage comparator using a modified latch with sustainable resources
In this paper, the current study uses a lector technique to modify the latch. The Lector approach is one of the top low-power methods for IC technologies. The locking mechanism is the third stage in our proposed design for a three-stage comparator. The lector approach is used for the three-stage com...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
EDP Sciences
2023-01-01
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| Series: | E3S Web of Conferences |
| Online Access: | https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/67/e3sconf_icmpc2023_01012.pdf |
| _version_ | 1797658777801981952 |
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| author | Navya Galla Jamal K. Valiveti Hima Bindu Kumar Gupta Jitendra Vandana B. |
| author_facet | Navya Galla Jamal K. Valiveti Hima Bindu Kumar Gupta Jitendra Vandana B. |
| author_sort | Navya Galla |
| collection | DOAJ |
| description | In this paper, the current study uses a lector technique to modify the latch. The Lector approach is one of the top low-power methods for IC technologies. The locking mechanism is the third stage in our proposed design for a three-stage comparator. The lector approach is used for the three-stage comparator circuit in this case and its modified version. Pre-amplifier stages are the first two levels. The improved performance of this comparator circuit uses two sets of complementary biased two-stage preamplifiers. The traditional three-stage amplifier decreased the latency, while the modified version of the modified three-stage amplifier focused on the kickback noise. The proposed design of this three-stage comparator, which employs a lector approach, concentrates mainly on lower consumption. Tanner EDA was used to build and simulate this complete schematic. Materials having a lesser environmental effect are chosen, such as those that use fewer resources or are simpler to recycle after a product’s lifespan and sustainability. |
| first_indexed | 2024-03-11T18:04:10Z |
| format | Article |
| id | doaj.art-6d86b6e9a89c41b28d4ebd0d738f3d93 |
| institution | Directory Open Access Journal |
| issn | 2267-1242 |
| language | English |
| last_indexed | 2024-03-11T18:04:10Z |
| publishDate | 2023-01-01 |
| publisher | EDP Sciences |
| record_format | Article |
| series | E3S Web of Conferences |
| spelling | doaj.art-6d86b6e9a89c41b28d4ebd0d738f3d932023-10-17T08:47:10ZengEDP SciencesE3S Web of Conferences2267-12422023-01-014300101210.1051/e3sconf/202343001012e3sconf_icmpc2023_01012Implementation of three stage comparator using a modified latch with sustainable resourcesNavya Galla0Jamal K.1Valiveti Hima Bindu2Kumar Gupta Jitendra3Vandana B.4GRIET, ECE DepartmentGRIET, ECE DepartmentGRIET, ECE DepartmentUttaranchal Institute of Technology, Uttaranchal UniversityKG Reddy College of Engineering & TechnologyIn this paper, the current study uses a lector technique to modify the latch. The Lector approach is one of the top low-power methods for IC technologies. The locking mechanism is the third stage in our proposed design for a three-stage comparator. The lector approach is used for the three-stage comparator circuit in this case and its modified version. Pre-amplifier stages are the first two levels. The improved performance of this comparator circuit uses two sets of complementary biased two-stage preamplifiers. The traditional three-stage amplifier decreased the latency, while the modified version of the modified three-stage amplifier focused on the kickback noise. The proposed design of this three-stage comparator, which employs a lector approach, concentrates mainly on lower consumption. Tanner EDA was used to build and simulate this complete schematic. Materials having a lesser environmental effect are chosen, such as those that use fewer resources or are simpler to recycle after a product’s lifespan and sustainability.https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/67/e3sconf_icmpc2023_01012.pdf |
| spellingShingle | Navya Galla Jamal K. Valiveti Hima Bindu Kumar Gupta Jitendra Vandana B. Implementation of three stage comparator using a modified latch with sustainable resources E3S Web of Conferences |
| title | Implementation of three stage comparator using a modified latch with sustainable resources |
| title_full | Implementation of three stage comparator using a modified latch with sustainable resources |
| title_fullStr | Implementation of three stage comparator using a modified latch with sustainable resources |
| title_full_unstemmed | Implementation of three stage comparator using a modified latch with sustainable resources |
| title_short | Implementation of three stage comparator using a modified latch with sustainable resources |
| title_sort | implementation of three stage comparator using a modified latch with sustainable resources |
| url | https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/67/e3sconf_icmpc2023_01012.pdf |
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