Characterization and Modeling of 0.18<italic>&#x03BC;</italic>m Bulk CMOS Technology at Sub-Kelvin Temperature

Previous cryogenic electronics studies are mostly at 77K and 4.2K. Cryogenic characterization of a 0.18&#x03BC;m standard bulk CMOS technology (operating voltages: 1.8V and 5V) is presented in this paper. Several NMOS and PMOS devices with different width to length ratios (W/L) were extensively...

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Bibliographic Details
Main Authors: Teng-Teng Lu, Zhen Li, Chao Luo, Jun Xu, Weicheng Kong, Guoping Guo
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9163160/
Description
Summary:Previous cryogenic electronics studies are mostly at 77K and 4.2K. Cryogenic characterization of a 0.18&#x03BC;m standard bulk CMOS technology (operating voltages: 1.8V and 5V) is presented in this paper. Several NMOS and PMOS devices with different width to length ratios (W/L) were extensively tested and characterized under various bias conditions at sub-kelvin temperature. In addition to devices dc characteristics, the kink effect and current overshoot phenomenon are observed and discussed at sub-kelvin temperature. Especially, the current overshoot phenomenon in PMOS devices at sub-kelvin temperature is shown for the first time. The transfer characteristics of MOSFET devices (1.8V W/L = 10&#x03BC;m/10&#x03BC;m) at sub-kelvin temperature are modeled using the simplified EKV model. This work facilitates the CMOS circuits design and the integration of CMOS circuits with silicon-based quantum chips at extremely low temperatures.
ISSN:2168-6734