Special Topic on Exploratory Devices and Circuits for Compute-in-Memory
Deep learning and nonconvex optimization problems are well known data-intensive applications. Although graphic processing units (GPUs) have become the mainstream platform to accelerate the algorithms in the cloud, there is a growing interest to develop application-specific integrated-circuit (ASIC)...
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| Format: | Article |
| Language: | English |
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IEEE
2020-01-01
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| Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| Online Access: | https://ieeexplore.ieee.org/document/9133210/ |
| _version_ | 1818619225561890816 |
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| author | Shimeng Yu |
| author_facet | Shimeng Yu |
| author_sort | Shimeng Yu |
| collection | DOAJ |
| description | Deep learning and nonconvex optimization problems are well known data-intensive applications. Although graphic processing units (GPUs) have become the mainstream platform to accelerate the algorithms in the cloud, there is a growing interest to develop application-specific integrated-circuit (ASIC) chips for further improving the energy-efficiency for these data-intensive workloads. Digital multiply-and-accumulate (MAC) arrays are generally employed as ASIC solutions, and data flow is often optimized to increase the data reuse on-chip. Nevertheless, most of the inputs and outputs are moved across MAC arrays and from global buffers. Therefore, it is more attractive to embed the MAC computations into the memory array itself, namely compute-in-memory (CIM), to minimize the data transfer. In CIM, the vector–matrix multiplication is executed in parallel (with analog computation) where the input vectors activate multiple rows. The dot-product is obtained as the multiplication of input voltage and cell conductance, and the partial sum is added up by the column current. An analog-to-digital converter (ADC) at the edge of the array generally converts the partial sum to binary bits for further digital processing. |
| first_indexed | 2024-12-16T17:34:06Z |
| format | Article |
| id | doaj.art-6e4c13b4017046b8adb853adbb556b1c |
| institution | Directory Open Access Journal |
| issn | 2329-9231 |
| language | English |
| last_indexed | 2024-12-16T17:34:06Z |
| publishDate | 2020-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| spelling | doaj.art-6e4c13b4017046b8adb853adbb556b1c2022-12-21T22:22:51ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312020-01-0161iiiiv10.1109/JXCDC.2020.30018599133210Special Topic on Exploratory Devices and Circuits for Compute-in-MemoryShimeng Yu0https://orcid.org/0000-0002-0068-3652Georgia Institute of Technology Atlanta, GA, USADeep learning and nonconvex optimization problems are well known data-intensive applications. Although graphic processing units (GPUs) have become the mainstream platform to accelerate the algorithms in the cloud, there is a growing interest to develop application-specific integrated-circuit (ASIC) chips for further improving the energy-efficiency for these data-intensive workloads. Digital multiply-and-accumulate (MAC) arrays are generally employed as ASIC solutions, and data flow is often optimized to increase the data reuse on-chip. Nevertheless, most of the inputs and outputs are moved across MAC arrays and from global buffers. Therefore, it is more attractive to embed the MAC computations into the memory array itself, namely compute-in-memory (CIM), to minimize the data transfer. In CIM, the vector–matrix multiplication is executed in parallel (with analog computation) where the input vectors activate multiple rows. The dot-product is obtained as the multiplication of input voltage and cell conductance, and the partial sum is added up by the column current. An analog-to-digital converter (ADC) at the edge of the array generally converts the partial sum to binary bits for further digital processing.https://ieeexplore.ieee.org/document/9133210/ |
| spellingShingle | Shimeng Yu Special Topic on Exploratory Devices and Circuits for Compute-in-Memory IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| title | Special Topic on Exploratory Devices and Circuits for Compute-in-Memory |
| title_full | Special Topic on Exploratory Devices and Circuits for Compute-in-Memory |
| title_fullStr | Special Topic on Exploratory Devices and Circuits for Compute-in-Memory |
| title_full_unstemmed | Special Topic on Exploratory Devices and Circuits for Compute-in-Memory |
| title_short | Special Topic on Exploratory Devices and Circuits for Compute-in-Memory |
| title_sort | special topic on exploratory devices and circuits for compute in memory |
| url | https://ieeexplore.ieee.org/document/9133210/ |
| work_keys_str_mv | AT shimengyu specialtopiconexploratorydevicesandcircuitsforcomputeinmemory |