Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter

In this paper, we propose a novel full-bridge (FB) diode-clamped four-level symmetric switching converter. Multi-neighboring reference vector discontinuous PWM (MNRV DPWM) for FB topology was implemented using a symmetric half-bridge (HB)-based control approach that incorporates an offset voltage ad...

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Main Authors: Min-Sup Song, Jaewon Kim, Jae-Bum Lee
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10256171/
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author Min-Sup Song
Jaewon Kim
Jae-Bum Lee
author_facet Min-Sup Song
Jaewon Kim
Jae-Bum Lee
author_sort Min-Sup Song
collection DOAJ
description In this paper, we propose a novel full-bridge (FB) diode-clamped four-level symmetric switching converter. Multi-neighboring reference vector discontinuous PWM (MNRV DPWM) for FB topology was implemented using a symmetric half-bridge (HB)-based control approach that incorporates an offset voltage addition method. A diode-clamped four-level symmetrical switching circuit with pulse-amplitude-modulation (PAM) was proposed and its working principle was explained in detail. Voltage gain, duty loss factor, and zero-voltage-switching (ZVS) condition were derived by analyzing the steady-state operating characteristics of the proposed converter. The required input and output capacitance values were also calculated explicitly. The voltages across the series-connected input DC-link capacitors were well balanced and the output voltage was controlled in a simple linear manner by PAM. The proposed method offers the advantage of reducing circulating current when compared to the existing phase-shift method, thanks to the inclusion of an additional power delivery period. The effectiveness of the proposed converter was verified through simulation and prototype experiments. The power conversion efficiency exceeded 91.44&#x0025; at an output power (<inline-formula> <tex-math notation="LaTeX">$P_{O})$ </tex-math></inline-formula> of 250W or higher, with a peak efficiency of 95.23&#x0025; achieved at <inline-formula> <tex-math notation="LaTeX">$P_{O}=750\text{W}$ </tex-math></inline-formula>.
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spelling doaj.art-6e5465659fa3404a9174632fdca524042023-10-02T23:01:55ZengIEEEIEEE Access2169-35362023-01-011110335010336310.1109/ACCESS.2023.331743210256171Full-Bridge Diode-Clamped Four-Level Symmetric Switching ConverterMin-Sup Song0https://orcid.org/0000-0001-6189-2872Jaewon Kim1https://orcid.org/0000-0002-8275-9656Jae-Bum Lee2https://orcid.org/0000-0001-9018-6221Electrification System Research Department, Smart Electrical &#x0026; Signaling Division, Korea Railroad Research Institute, Uiwang-si, South KoreaElectrification System Research Department, Smart Electrical &#x0026; Signaling Division, Korea Railroad Research Institute, Uiwang-si, South KoreaDepartment of Railroad Electrical and Electronics Engineering, Korea National University of Transportation, Uiwang-si, South KoreaIn this paper, we propose a novel full-bridge (FB) diode-clamped four-level symmetric switching converter. Multi-neighboring reference vector discontinuous PWM (MNRV DPWM) for FB topology was implemented using a symmetric half-bridge (HB)-based control approach that incorporates an offset voltage addition method. A diode-clamped four-level symmetrical switching circuit with pulse-amplitude-modulation (PAM) was proposed and its working principle was explained in detail. Voltage gain, duty loss factor, and zero-voltage-switching (ZVS) condition were derived by analyzing the steady-state operating characteristics of the proposed converter. The required input and output capacitance values were also calculated explicitly. The voltages across the series-connected input DC-link capacitors were well balanced and the output voltage was controlled in a simple linear manner by PAM. The proposed method offers the advantage of reducing circulating current when compared to the existing phase-shift method, thanks to the inclusion of an additional power delivery period. The effectiveness of the proposed converter was verified through simulation and prototype experiments. The power conversion efficiency exceeded 91.44&#x0025; at an output power (<inline-formula> <tex-math notation="LaTeX">$P_{O})$ </tex-math></inline-formula> of 250W or higher, with a peak efficiency of 95.23&#x0025; achieved at <inline-formula> <tex-math notation="LaTeX">$P_{O}=750\text{W}$ </tex-math></inline-formula>.https://ieeexplore.ieee.org/document/10256171/Full-bridgediode-clamped converterfour-levelsymmetric switchingDC-link voltage balancingpulse-amplitude-modulation
spellingShingle Min-Sup Song
Jaewon Kim
Jae-Bum Lee
Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
IEEE Access
Full-bridge
diode-clamped converter
four-level
symmetric switching
DC-link voltage balancing
pulse-amplitude-modulation
title Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
title_full Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
title_fullStr Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
title_full_unstemmed Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
title_short Full-Bridge Diode-Clamped Four-Level Symmetric Switching Converter
title_sort full bridge diode clamped four level symmetric switching converter
topic Full-bridge
diode-clamped converter
four-level
symmetric switching
DC-link voltage balancing
pulse-amplitude-modulation
url https://ieeexplore.ieee.org/document/10256171/
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AT jaebumlee fullbridgediodeclampedfourlevelsymmetricswitchingconverter