Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM)
The Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice f...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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IEEE
2021-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9296235/ |
| _version_ | 1818899439590309888 |
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| author | Y. Hernandez-Barrios J. N. Gaspar-Angeles M. Estrada B. Iniguez A. Cerdeira |
| author_facet | Y. Hernandez-Barrios J. N. Gaspar-Angeles M. Estrada B. Iniguez A. Cerdeira |
| author_sort | Y. Hernandez-Barrios |
| collection | DOAJ |
| description | The Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice from Silvaco. The model includes the extrinsic effects related to specific overlap capacitances present in bottom-gate AOSTFT structures. The dynamic behavior of the simulated circuit, when the TFT internal capacitances are increased or decreased and for different supply voltages of 10, 15 and 20 V, is compared with measured characteristics, obtaining a very good agreement. Afterwards, the AFCM is used to simulate the dynamic behavior of a pixel control circuit for a light emitting diode active matrix display (AMOLED), using an AOSTFT. |
| first_indexed | 2024-12-19T19:47:59Z |
| format | Article |
| id | doaj.art-6ed8c638eb434057bc8691b14827a39f |
| institution | Directory Open Access Journal |
| issn | 2168-6734 |
| language | English |
| last_indexed | 2024-12-19T19:47:59Z |
| publishDate | 2021-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj.art-6ed8c638eb434057bc8691b14827a39f2022-12-21T20:08:06ZengIEEEIEEE Journal of the Electron Devices Society2168-67342021-01-01946446810.1109/JEDS.2020.30453479296235Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM)Y. Hernandez-Barrios0https://orcid.org/0000-0001-7190-2069J. N. Gaspar-Angeles1M. Estrada2B. Iniguez3https://orcid.org/0000-0002-6504-7980A. Cerdeira4https://orcid.org/0000-0002-2114-2468Departamento de Ingeniería Eléctrica, SEES, CINVESTAV-IPN, Mexico City, MexicoDepartamento de Ingeniería Eléctrica, SEES, CINVESTAV-IPN, Mexico City, MexicoDepartamento de Ingeniería Eléctrica, SEES, CINVESTAV-IPN, Mexico City, MexicoDepartament d’Enginyeria Electrónica, Eléctrica i Automática, Universitat Rovira i Virgili, Tarragona, SpainDepartamento de Ingeniería Eléctrica, SEES, CINVESTAV-IPN, Mexico City, MexicoThe Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice from Silvaco. The model includes the extrinsic effects related to specific overlap capacitances present in bottom-gate AOSTFT structures. The dynamic behavior of the simulated circuit, when the TFT internal capacitances are increased or decreased and for different supply voltages of 10, 15 and 20 V, is compared with measured characteristics, obtaining a very good agreement. Afterwards, the AFCM is used to simulate the dynamic behavior of a pixel control circuit for a light emitting diode active matrix display (AMOLED), using an AOSTFT.https://ieeexplore.ieee.org/document/9296235/Circuit simulatordynamic modelVerilog-Acapacitances model |
| spellingShingle | Y. Hernandez-Barrios J. N. Gaspar-Angeles M. Estrada B. Iniguez A. Cerdeira Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) IEEE Journal of the Electron Devices Society Circuit simulator dynamic model Verilog-A capacitances model |
| title | Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) |
| title_full | Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) |
| title_fullStr | Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) |
| title_full_unstemmed | Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) |
| title_short | Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM) |
| title_sort | dynamic simulation of a igzo tft circuits using the analytical full capacitance model afcm |
| topic | Circuit simulator dynamic model Verilog-A capacitances model |
| url | https://ieeexplore.ieee.org/document/9296235/ |
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