Efficient field‐programmable gate array‐based reconfigurable accelerator for deep convolution neural network
Abstract Deep convolutional neural networks (DCNNs) have been widely applied in various modern artificial intelligence (AI) applications. DCNN's inference is a process with high calculation costs, which usually requires billions of multiply‐accumulate operations. On mobile platforms such as emb...
Main Authors: | Xianghong Hu, Taosheng Chen, Hongmin Huang, Zihao Liu, Xueming Li, Xiaoming Xiong |
---|---|
Format: | Article |
Language: | English |
Published: |
Wiley
2021-03-01
|
Series: | Electronics Letters |
Subjects: | |
Online Access: | https://doi.org/10.1049/ell2.12121 |
Similar Items
-
An efficient loop tiling framework for convolutional neural network inference accelerators
by: Hongmin Huang, et al.
Published: (2022-01-01) -
Design Space Exploration for YOLO Neural Network Accelerator
by: Hongmin Huang, et al.
Published: (2020-11-01) -
Reconfigurable computing : accelerating computation with field-programmable gate arrays /
by: 314477 Gokhale, Maya, et al.
Published: (2005) -
A digital signal processor‐efficient accelerator for depthwise separable convolution
by: Xueming Li, et al.
Published: (2022-03-01) -
Field-programmable gate array based fog analytic node architecture with reconfigurable application plane /
by: Tan, Tze Hon, 1988-, author 583937, et al.
Published: (2022)