Test Scheduling and Test Time Minimization of System-on-Chip Using Modified BAT Algorithm
System-on-Chip (SoC) is a structure in which semiconductor components are integrated into a single die. As a result, testing time should be reduced to achieve a low cost for each chip. Effective test scheduling can reduce the SoC testing time, which is more challenging due to its complexity. In this...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2022-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9964215/ |