Low-Power SAR ADCs: Basic Techniques and Trends

With the advent of small, battery-powered devices, power efficiency has become of paramount importance. For analog-to-digital converters (ADCs), the successive approximation register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architectur...

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Main Author: Pieter Harpe
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Open Journal of the Solid-State Circuits Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9908164/
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author Pieter Harpe
author_facet Pieter Harpe
author_sort Pieter Harpe
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description With the advent of small, battery-powered devices, power efficiency has become of paramount importance. For analog-to-digital converters (ADCs), the successive approximation register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architecture, a broad application scope, and technology portability. In this review article, the basic design challenges for low-power SAR ADCs are summarized and several design techniques are illustrated. Furthermore, the limitations of SAR ADCs are outlined and hybrid architecture trends, such as noise-shaping SAR ADCs and pipelined SAR ADCs, are briefly introduced and clarified with examples.
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spelling doaj.art-73e2f25d73ba476493f5090a8f3ecff42024-04-22T20:40:03ZengIEEEIEEE Open Journal of the Solid-State Circuits Society2644-13492022-01-012738110.1109/OJSSCS.2022.32114829908164Low-Power SAR ADCs: Basic Techniques and TrendsPieter Harpe0https://orcid.org/0000-0002-6542-0001Electrical Engineering Department, Eindhoven University of Technology, Eindhoven, The NetherlandsWith the advent of small, battery-powered devices, power efficiency has become of paramount importance. For analog-to-digital converters (ADCs), the successive approximation register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architecture, a broad application scope, and technology portability. In this review article, the basic design challenges for low-power SAR ADCs are summarized and several design techniques are illustrated. Furthermore, the limitations of SAR ADCs are outlined and hybrid architecture trends, such as noise-shaping SAR ADCs and pipelined SAR ADCs, are briefly introduced and clarified with examples.https://ieeexplore.ieee.org/document/9908164/Analog-to-digital converter (ADC)low powernoise shapingsuccessive approximationswitched-capacitor circuit
spellingShingle Pieter Harpe
Low-Power SAR ADCs: Basic Techniques and Trends
IEEE Open Journal of the Solid-State Circuits Society
Analog-to-digital converter (ADC)
low power
noise shaping
successive approximation
switched-capacitor circuit
title Low-Power SAR ADCs: Basic Techniques and Trends
title_full Low-Power SAR ADCs: Basic Techniques and Trends
title_fullStr Low-Power SAR ADCs: Basic Techniques and Trends
title_full_unstemmed Low-Power SAR ADCs: Basic Techniques and Trends
title_short Low-Power SAR ADCs: Basic Techniques and Trends
title_sort low power sar adcs basic techniques and trends
topic Analog-to-digital converter (ADC)
low power
noise shaping
successive approximation
switched-capacitor circuit
url https://ieeexplore.ieee.org/document/9908164/
work_keys_str_mv AT pieterharpe lowpowersaradcsbasictechniquesandtrends