Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips
This paper presents the design of a buck converter for use in low-power system-on-chips (SoCs) with a ripple voltage small enough to directly power sensitive analog circuits without the help of low-dropout voltage regulators (LDOs). To minimize the ripple voltage while maximizing the converter&#...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10301545/ |
| _version_ | 1797634004647673856 |
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| author | Siwakorn Thongmark Woradorn Wattanapanitch |
| author_facet | Siwakorn Thongmark Woradorn Wattanapanitch |
| author_sort | Siwakorn Thongmark |
| collection | DOAJ |
| description | This paper presents the design of a buck converter for use in low-power system-on-chips (SoCs) with a ripple voltage small enough to directly power sensitive analog circuits without the help of low-dropout voltage regulators (LDOs). To minimize the ripple voltage while maximizing the converter’s light-load efficiency, we employ a pulse-frequency modulation (PFM) scheme and a fast duty-cycled comparator to control the converter’s output voltage. The duty cycling of the comparator, automatically performed by the Sleep State Controller (SSC), helps improve the light-load efficiency by 48%. Fabricated in a 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process with an active area of <inline-formula> <tex-math notation="LaTeX">$0.42 ~\mathrm {mm}^{2}$ </tex-math></inline-formula>, the proposed low-ripple buck converter achieves the ripple voltage of <inline-formula> <tex-math notation="LaTeX">$1.6~ \mathrm {mV_{pp}}$ </tex-math></inline-formula> and the overall efficiency of higher than 74.4% over the load current range from <inline-formula> <tex-math notation="LaTeX">$1.2 \mu \text{A}$ </tex-math></inline-formula> to 1.8 mA. |
| first_indexed | 2024-03-11T12:02:41Z |
| format | Article |
| id | doaj.art-764c82b85a5b4a59a42a107470fc3426 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-11T12:02:41Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-764c82b85a5b4a59a42a107470fc34262023-11-08T00:01:03ZengIEEEIEEE Access2169-35362023-01-011112256612258510.1109/ACCESS.2023.332877210301545Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-ChipsSiwakorn Thongmark0Woradorn Wattanapanitch1https://orcid.org/0000-0003-1981-4963Department of Electrical Engineering, Faculty of Engineering, Kasetsart University, Bangkok, ThailandDepartment of Electrical Engineering, Faculty of Engineering, Kasetsart University, Bangkok, ThailandThis paper presents the design of a buck converter for use in low-power system-on-chips (SoCs) with a ripple voltage small enough to directly power sensitive analog circuits without the help of low-dropout voltage regulators (LDOs). To minimize the ripple voltage while maximizing the converter’s light-load efficiency, we employ a pulse-frequency modulation (PFM) scheme and a fast duty-cycled comparator to control the converter’s output voltage. The duty cycling of the comparator, automatically performed by the Sleep State Controller (SSC), helps improve the light-load efficiency by 48%. Fabricated in a 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process with an active area of <inline-formula> <tex-math notation="LaTeX">$0.42 ~\mathrm {mm}^{2}$ </tex-math></inline-formula>, the proposed low-ripple buck converter achieves the ripple voltage of <inline-formula> <tex-math notation="LaTeX">$1.6~ \mathrm {mV_{pp}}$ </tex-math></inline-formula> and the overall efficiency of higher than 74.4% over the load current range from <inline-formula> <tex-math notation="LaTeX">$1.2 \mu \text{A}$ </tex-math></inline-formula> to 1.8 mA.https://ieeexplore.ieee.org/document/10301545/Switching DC-DC converterbuck converterlow-powerpower-management circuitshigh-efficiencylow ripple voltage |
| spellingShingle | Siwakorn Thongmark Woradorn Wattanapanitch Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips IEEE Access Switching DC-DC converter buck converter low-power power-management circuits high-efficiency low ripple voltage |
| title | Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips |
| title_full | Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips |
| title_fullStr | Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips |
| title_full_unstemmed | Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips |
| title_short | Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips |
| title_sort | design of a high efficiency low ripple buck converter for low power system on chips |
| topic | Switching DC-DC converter buck converter low-power power-management circuits high-efficiency low ripple voltage |
| url | https://ieeexplore.ieee.org/document/10301545/ |
| work_keys_str_mv | AT siwakornthongmark designofahighefficiencylowripplebuckconverterforlowpowersystemonchips AT woradornwattanapanitch designofahighefficiencylowripplebuckconverterforlowpowersystemonchips |