A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort
This paper offers a detailed analysis as well as a tuning and discretization approach of the presented frequency-fixed dual second order generalized integrator based phase-locked loop (FFDSOGI-PLL) for three-phase power systems. The method combines different single- and three-phase PLL approaches by...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10093868/ |
| _version_ | 1797847361386446848 |
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| author | Benjamin Hoepfner Ralf Vick |
| author_facet | Benjamin Hoepfner Ralf Vick |
| author_sort | Benjamin Hoepfner |
| collection | DOAJ |
| description | This paper offers a detailed analysis as well as a tuning and discretization approach of the presented frequency-fixed dual second order generalized integrator based phase-locked loop (FFDSOGI-PLL) for three-phase power systems. The method combines different single- and three-phase PLL approaches by ensuring high phase- and frequency tracking properties. The comparison with the standard frequency-variable DSOGI-PLL and three different recently published three-phase frequency and phase-angle estimation systems shows, that this approach gives a fast and stable phase and frequency detection of the grid voltage with very low computational burden. The results are applicable to, for instance, photovoltaic or frequency converters or active power filters. |
| first_indexed | 2024-04-09T18:10:08Z |
| format | Article |
| id | doaj.art-765851b7e47444e09503f3dd71ae36dc |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-04-09T18:10:08Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-765851b7e47444e09503f3dd71ae36dc2023-04-13T23:01:02ZengIEEEIEEE Access2169-35362023-01-0111349323494110.1109/ACCESS.2023.326529910093868A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational EffortBenjamin Hoepfner0https://orcid.org/0000-0001-8400-7696Ralf Vick1https://orcid.org/0000-0003-0198-4833Chair of Electromagnetic Compatibility (EMV), Otto-von-Guericke University Magdeburg, Magdeburg, GermanyChair of Electromagnetic Compatibility (EMV), Otto-von-Guericke University Magdeburg, Magdeburg, GermanyThis paper offers a detailed analysis as well as a tuning and discretization approach of the presented frequency-fixed dual second order generalized integrator based phase-locked loop (FFDSOGI-PLL) for three-phase power systems. The method combines different single- and three-phase PLL approaches by ensuring high phase- and frequency tracking properties. The comparison with the standard frequency-variable DSOGI-PLL and three different recently published three-phase frequency and phase-angle estimation systems shows, that this approach gives a fast and stable phase and frequency detection of the grid voltage with very low computational burden. The results are applicable to, for instance, photovoltaic or frequency converters or active power filters.https://ieeexplore.ieee.org/document/10093868/Phase-locked loop (PLL)frequency-locked loop (FLL)SOGIsynchronization |
| spellingShingle | Benjamin Hoepfner Ralf Vick A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort IEEE Access Phase-locked loop (PLL) frequency-locked loop (FLL) SOGI synchronization |
| title | A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort |
| title_full | A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort |
| title_fullStr | A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort |
| title_full_unstemmed | A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort |
| title_short | A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort |
| title_sort | three phase frequency fixed dsogi pll with low computational effort |
| topic | Phase-locked loop (PLL) frequency-locked loop (FLL) SOGI synchronization |
| url | https://ieeexplore.ieee.org/document/10093868/ |
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