Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model

Stencil computation is one kind of the most important loop kernels in scientific and engineering computing applications.Loop tiling can effectively improve the data locality of stencil computation and the degree of computational parallelism,but the best tile size is hard to choose.Traditional tile s...

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Main Author: BAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao
Format: Article
Language:zho
Published: Editorial office of Computer Science 2022-10-01
Series:Jisuanji kexue
Subjects:
Online Access:https://www.jsjkx.com/fileup/1002-137X/PDF/1002-137X-2022-49-10-18.pdf
_version_ 1797845134995357696
author BAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao
author_facet BAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao
author_sort BAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao
collection DOAJ
description Stencil computation is one kind of the most important loop kernels in scientific and engineering computing applications.Loop tiling can effectively improve the data locality of stencil computation and the degree of computational parallelism,but the best tile size is hard to choose.Traditional tile size selection methods usually have shortcomings in some ways of time overhead,labor cost and model accuracy.In this paper,a tile size selection method based on artificial neural network is proposed to predict the optimal tile size of three-dimensional Jacobi stencil loop programs.Experimental results show that,for 11 real stencil programs,the performance improvement of the programs using the model prediction tile size compared with the non tiling is 2% and 35% in serial and parallel tests respectively.Compared with the well-known grid search method,our method has a similar prediction accuracy,but only takes one 30 thousandth of the online time cost.In addition,compared with the Turbo-tiling method,our method improves the performance of tiled codes nearly 9% in average.
first_indexed 2024-04-09T17:33:41Z
format Article
id doaj.art-7674ba461cec4bc6900af00ea21ae6ad
institution Directory Open Access Journal
issn 1002-137X
language zho
last_indexed 2024-04-09T17:33:41Z
publishDate 2022-10-01
publisher Editorial office of Computer Science
record_format Article
series Jisuanji kexue
spelling doaj.art-7674ba461cec4bc6900af00ea21ae6ad2023-04-18T02:32:39ZzhoEditorial office of Computer ScienceJisuanji kexue1002-137X2022-10-014910182610.11896/jsjkx.220100147Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network ModelBAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao01 Graduate School of China Academy of Engineering Physics,Beijing 100094,China ;2 Institute of Applied Physics and Computational Mathematics,Beijing 100088,China ;3 CAEP Software Center for High Performance Numerical Simulation,Beijing 100088,China ;4 China Academy of Engineering Physics,Mianyang,Sichuan 621900,ChinaStencil computation is one kind of the most important loop kernels in scientific and engineering computing applications.Loop tiling can effectively improve the data locality of stencil computation and the degree of computational parallelism,but the best tile size is hard to choose.Traditional tile size selection methods usually have shortcomings in some ways of time overhead,labor cost and model accuracy.In this paper,a tile size selection method based on artificial neural network is proposed to predict the optimal tile size of three-dimensional Jacobi stencil loop programs.Experimental results show that,for 11 real stencil programs,the performance improvement of the programs using the model prediction tile size compared with the non tiling is 2% and 35% in serial and parallel tests respectively.Compared with the well-known grid search method,our method has a similar prediction accuracy,but only takes one 30 thousandth of the online time cost.In addition,compared with the Turbo-tiling method,our method improves the performance of tiled codes nearly 9% in average.https://www.jsjkx.com/fileup/1002-137X/PDF/1002-137X-2022-49-10-18.pdfstencil computation|loop tiling technology|machine learning|artificial neural network
spellingShingle BAO Yi-kun, ZHANG Peng, XU Xiao-wen, MO Ze-yao
Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
Jisuanji kexue
stencil computation|loop tiling technology|machine learning|artificial neural network
title Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
title_full Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
title_fullStr Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
title_full_unstemmed Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
title_short Prediction of Optimal Loop Tiling Size for stencil Computation Based on Neural Network Model
title_sort prediction of optimal loop tiling size for stencil computation based on neural network model
topic stencil computation|loop tiling technology|machine learning|artificial neural network
url https://www.jsjkx.com/fileup/1002-137X/PDF/1002-137X-2022-49-10-18.pdf
work_keys_str_mv AT baoyikunzhangpengxuxiaowenmozeyao predictionofoptimallooptilingsizeforstencilcomputationbasedonneuralnetworkmodel