A 32-Bit DSP Instruction Pipeline Control Unit Verification Method Based on Instruction Reordering Strategy
The growing complexity and size of integrated circuits has made functional verification a huge challenge. As the control center of integrated circuit hardware design, any design errors in the Instruction Pipeline Control Unit (IPCU) will put the entire chip at significant risk. Verification of the I...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2022-03-01
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| Series: | Symmetry |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2073-8994/14/4/646 |